Patchwork [1/2] ARM i.MX6DL: parent LDB DI clocks to PLL5 on i.MX6S/DL

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Submitter Philipp Zabel
Date June 28, 2013, 12:24 p.m.
Message ID <1372422256-22037-1-git-send-email-p.zabel@pengutronix.de>
Download mbox | patch
Permalink /patch/255352/
State New
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Comments

Philipp Zabel - June 28, 2013, 12:24 p.m.
i.MX6S/DL have the Video PLL post dividers fixed already in revision 1.0

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 arch/arm/mach-imx/clk-imx6q.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Shawn Guo - July 1, 2013, 8:45 a.m.
On Fri, Jun 28, 2013 at 02:24:15PM +0200, Philipp Zabel wrote:
> i.MX6S/DL have the Video PLL post dividers fixed already in revision 1.0
> 
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

Applied, thanks.

Shawn
Shawn Guo - July 1, 2013, 8:52 a.m.
On Fri, Jun 28, 2013 at 02:24:16PM +0200, Philipp Zabel wrote:
> i.MX6DL does not have the second IPU, but the LVDS multiplexers can connect
> either LVDS channel of the LDB to IPU1 DI0 or IPU1 DI1.
> 
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> ---
>  arch/arm/boot/dts/imx6dl.dtsi | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
> index 80155fde..5ec89eb 100644
> --- a/arch/arm/boot/dts/imx6dl.dtsi
> +++ b/arch/arm/boot/dts/imx6dl.dtsi
> @@ -417,3 +417,20 @@
>  		};
>  	};
>  };
> +
> +&ldb {
> +	clocks = <&clks 33>, <&clks 34>,
> +		 <&clks 39>, <&clks 40>,
> +		 <&clks 135>, <&clks 136>;
> +	clock-names = "di0_pll", "di1_pll",
> +		      "di0_sel", "di1_sel",
> +		      "di0", "di1";
> +
> +	lvds-channel@0 {
> +		crtcs = <&ipu1 0>, <&ipu1 1>;
> +	};
> +
> +	lvds-channel@1 {
> +		crtcs = <&ipu1 0>, <&ipu1 1>;
> +	};

So now we have both imx6q.dtsi and imx6dl.dtsi overwrite the "crtcs"
defined in imx6qdl.dtsi.  Should we remove it from imx6qdl.dtsi, or
define a sane one in imx6qdl.dtsi to save one overwrite?

Shawn

> +};
> -- 
> 1.8.3.1
>
Philipp Zabel - July 1, 2013, 8:59 a.m.
Hi Shawn,

Am Montag, den 01.07.2013, 16:52 +0800 schrieb Shawn Guo:
> On Fri, Jun 28, 2013 at 02:24:16PM +0200, Philipp Zabel wrote:
> > i.MX6DL does not have the second IPU, but the LVDS multiplexers can connect
> > either LVDS channel of the LDB to IPU1 DI0 or IPU1 DI1.
> > 
> > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> > ---
> >  arch/arm/boot/dts/imx6dl.dtsi | 17 +++++++++++++++++
> >  1 file changed, 17 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
> > index 80155fde..5ec89eb 100644
> > --- a/arch/arm/boot/dts/imx6dl.dtsi
> > +++ b/arch/arm/boot/dts/imx6dl.dtsi
> > @@ -417,3 +417,20 @@
> >  		};
> >  	};
> >  };
> > +
> > +&ldb {
> > +	clocks = <&clks 33>, <&clks 34>,
> > +		 <&clks 39>, <&clks 40>,
> > +		 <&clks 135>, <&clks 136>;
> > +	clock-names = "di0_pll", "di1_pll",
> > +		      "di0_sel", "di1_sel",
> > +		      "di0", "di1";
> > +
> > +	lvds-channel@0 {
> > +		crtcs = <&ipu1 0>, <&ipu1 1>;
> > +	};
> > +
> > +	lvds-channel@1 {
> > +		crtcs = <&ipu1 0>, <&ipu1 1>;
> > +	};
> 
> So now we have both imx6q.dtsi and imx6dl.dtsi overwrite the "crtcs"
> defined in imx6qdl.dtsi.  Should we remove it from imx6qdl.dtsi, or
> define a sane one in imx6qdl.dtsi to save one overwrite?
> 
> Shawn

I'd rather remove it from imx6qdl.dtsi completely.

regards
Philipp
Shawn Guo - July 1, 2013, 1:42 p.m.
On Mon, Jul 01, 2013 at 10:59:05AM +0200, Philipp Zabel wrote:
> 
> I'd rather remove it from imx6qdl.dtsi completely.
> 
Ok, I removed it and applied the patch.

Shawn

Patch

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 4282e99f..eb02b49 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -553,7 +553,7 @@  static void __init imx6q_clocks_init(struct device_node *ccm_node)
 	clk_register_clkdev(clk[pll4_post_div], "pll4_post_div", NULL);
 	clk_register_clkdev(clk[pll4_audio], "pll4_audio", NULL);
 
-	if (imx6q_revision() != IMX_CHIP_REVISION_1_0) {
+	if ((imx6q_revision() != IMX_CHIP_REVISION_1_0) || cpu_is_imx6dl()) {
 		clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]);
 		clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]);
 	}