Patchwork powerpc: don't flush/invalidate the d/icache for an unknown relocation type

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Submitter Kevin Hao
Date June 27, 2013, 1:09 a.m.
Message ID <1372295383-19740-1-git-send-email-haokexin@gmail.com>
Download mbox | patch
Permalink /patch/254925/
State Accepted, archived
Commit 348c2298a6fd2b145e789739808d5e7598e275fc
Headers show

Comments

Kevin Hao - June 27, 2013, 1:09 a.m.
For an unknown relocation type since the value of r4 is just the 8bit
relocation type, the sum of r4 and r7 may yield an invalid memory
address. For example:
    In normal case:
             r4 = c00xxxxx
             r7 = 40000000
             r4 + r7 = 000xxxxx

    For an unknown relocation type:
             r4 = 000000xx
             r7 = 40000000
             r4 + r7 = 400000xx
   400000xx is an invalid memory address for a board which has just
   512M memory.

And for operations such as dcbst or icbi may cause bus error for an
invalid memory address on some platforms and then cause the board
reset. So we should skip the flush/invalidate the d/icache for
an unknown relocation type.

Signed-off-by: Kevin Hao <haokexin@gmail.com>
---
 arch/powerpc/kernel/reloc_32.S | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
Suzuki Poulose - June 27, 2013, 6:36 a.m.
On 06/27/2013 06:39 AM, Kevin Hao wrote:
> For an unknown relocation type since the value of r4 is just the 8bit
> relocation type, the sum of r4 and r7 may yield an invalid memory
> address. For example:
>      In normal case:
>               r4 = c00xxxxx
>               r7 = 40000000
>               r4 + r7 = 000xxxxx
>
>      For an unknown relocation type:
>               r4 = 000000xx
>               r7 = 40000000
>               r4 + r7 = 400000xx
>     400000xx is an invalid memory address for a board which has just
>     512M memory.
>
> And for operations such as dcbst or icbi may cause bus error for an
> invalid memory address on some platforms and then cause the board
> reset. So we should skip the flush/invalidate the d/icache for
> an unknown relocation type.
>

Good catch. Thanks for the fix.

Acked-by: Suzuki K. Poulose <suzuki@in.ibm.com>

Patch

diff --git a/arch/powerpc/kernel/reloc_32.S b/arch/powerpc/kernel/reloc_32.S
index ef46ba6..f366fed 100644
--- a/arch/powerpc/kernel/reloc_32.S
+++ b/arch/powerpc/kernel/reloc_32.S
@@ -166,7 +166,7 @@  ha16:
 	/* R_PPC_ADDR16_LO */
 lo16:
 	cmpwi	r4, R_PPC_ADDR16_LO
-	bne	nxtrela
+	bne	unknown_type
 	lwz	r4, 0(r9)	/* r_offset */
 	lwz	r0, 8(r9)	/* r_addend */
 	add	r0, r0, r3
@@ -191,6 +191,7 @@  nxtrela:
 	dcbst	r4,r7
 	sync			/* Ensure the data is flushed before icbi */
 	icbi	r4,r7
+unknown_type:
 	cmpwi	r8, 0		/* relasz = 0 ? */
 	ble	done
 	add	r9, r9, r6	/* move to next entry in the .rela table */