From patchwork Wed Jun 26 09:28:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi Doyu X-Patchwork-Id: 254658 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 719852C0095 for ; Wed, 26 Jun 2013 19:29:08 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751401Ab3FZJ3H (ORCPT ); Wed, 26 Jun 2013 05:29:07 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:3770 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751445Ab3FZJ3H (ORCPT ); Wed, 26 Jun 2013 05:29:07 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Wed, 26 Jun 2013 02:28:39 -0700 Received: from hqemhub03.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Wed, 26 Jun 2013 02:29:05 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Wed, 26 Jun 2013 02:29:05 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQEMHUB03.nvidia.com (172.20.150.15) with Microsoft SMTP Server id 8.3.298.1; Wed, 26 Jun 2013 02:29:06 -0700 Received: from sc-daphne.nvidia.com (Not Verified[172.20.232.60]) by hqnvemgw01.nvidia.com with MailMarshal (v7,1,2,5326) id ; Wed, 26 Jun 2013 02:29:05 -0700 Received: from oreo.Nvidia.com (dhcp-10-21-26-134.nvidia.com [10.21.26.134]) by sc-daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r5Q9SmQp017123; Wed, 26 Jun 2013 02:29:04 -0700 (PDT) From: Hiroshi Doyu To: CC: , , Hiroshi Doyu Subject: [PATCH 06/23] ARM: dt: tegra114: iommu: Add "nvidia,swgroups" Date: Wed, 26 Jun 2013 12:28:09 +0300 Message-ID: <1372238906-9346-7-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.8.1.5 MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This is a bitmap that indicates which HardWare Accelerators(HWA) are supported on Tegra114 SoC. Signed-off-by: Hiroshi Doyu --- arch/arm/boot/dts/tegra114.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 1f45cf5..715b5d6 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -323,7 +323,7 @@ 0x70019228 0x074>; nvidia,#asids = <4>; dma-window = <0 0x40000000>; - nvidia,swgroups = <0x18659fe>; + nvidia,swgroups = <0x00000000 0x01b659fe>; nvidia,ahb = <&ahb>; };