Patchwork [AArch64] Minor refactoring of aarch64_force_temporary

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Submitter Yufeng Zhang
Date June 25, 2013, 4:06 p.m.
Message ID <51C9BFED.2000409@arm.com>
Download mbox | patch
Permalink /patch/254220/
State New
Headers show

Comments

Yufeng Zhang - June 25, 2013, 4:06 p.m.
This patch adds a new parameter 'mode' of type 'enum machine_mode mode' 
to aarch64_force_temporary, and updates the calls to it.

OK for the trunk?

Thanks,
Yufeng

gcc/

         * config/aarch64/aarch64.c (aarch64_force_temporary): Add an extra
         parameter 'mode' of type 'enum machine_mode mode'; change to pass
         'mode' to force_reg.
         (aarch64_add_offset): Update calls to aarch64_force_temporary.
         (aarch64_expand_mov_immediate): Likewise.
Marcus Shawcroft - June 27, 2013, 11:46 a.m.
On 25/06/13 17:06, Yufeng Zhang wrote:
> This patch adds a new parameter 'mode' of type 'enum machine_mode mode'
> to aarch64_force_temporary, and updates the calls to it.
>
> OK for the trunk?

OK
/Marcus

Patch

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 81c6fd9..77591c1 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -789,10 +789,10 @@  aarch64_split_simd_move (rtx dst, rtx src)
 }
 
 static rtx
-aarch64_force_temporary (rtx x, rtx value)
+aarch64_force_temporary (enum machine_mode mode, rtx x, rtx value)
 {
   if (can_create_pseudo_p ())
-    return force_reg (Pmode, value);
+    return force_reg (mode, value);
   else
     {
       x = aarch64_emit_move (x, value);
@@ -811,8 +811,9 @@  aarch64_add_offset (enum machine_mode mode, rtx temp, rtx reg, HOST_WIDE_INT off
          might be improvable in the future.  */
       high = GEN_INT (offset);
       offset = 0;
-      high = aarch64_force_temporary (temp, high);
-      reg = aarch64_force_temporary (temp, gen_rtx_PLUS (mode, high, reg));
+      high = aarch64_force_temporary (mode, temp, high);
+      reg = aarch64_force_temporary (mode, temp,
+				     gen_rtx_PLUS (mode, high, reg));
     }
   return plus_constant (mode, reg, offset);
 }
@@ -851,7 +852,7 @@  aarch64_expand_mov_immediate (rtx dest, rtx imm)
 	      && targetm.cannot_force_const_mem (mode, imm))
 	    {
 	      gcc_assert(can_create_pseudo_p ());
-	      base = aarch64_force_temporary (dest, base);
+	      base = aarch64_force_temporary (mode, dest, base);
 	      base = aarch64_add_offset (mode, NULL, base, INTVAL (offset));
 	      aarch64_emit_move (dest, base);
 	      return;
@@ -868,7 +869,7 @@  aarch64_expand_mov_immediate (rtx dest, rtx imm)
 	  if (offset != const0_rtx)
 	    {
 	      gcc_assert(can_create_pseudo_p ());
-	      base = aarch64_force_temporary (dest, base);
+	      base = aarch64_force_temporary (mode, dest, base);
 	      base = aarch64_add_offset (mode, NULL, base, INTVAL (offset));
 	      aarch64_emit_move (dest, base);
 	      return;