From patchwork Sat Jun 22 08:50:18 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hu Tao X-Patchwork-Id: 253390 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 034922C0411 for ; Sat, 22 Jun 2013 19:19:09 +1000 (EST) Received: from localhost ([::1]:49218 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UqJbc-00088B-0K for incoming@patchwork.ozlabs.org; Sat, 22 Jun 2013 04:55:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43496) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UqJY0-000153-J4 for qemu-devel@nongnu.org; Sat, 22 Jun 2013 04:51:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UqJXw-0003al-TH for qemu-devel@nongnu.org; Sat, 22 Jun 2013 04:51:52 -0400 Received: from [222.73.24.84] (port=49156 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UqJXw-0003Zv-Hp for qemu-devel@nongnu.org; Sat, 22 Jun 2013 04:51:48 -0400 X-IronPort-AV: E=Sophos;i="4.87,917,1363104000"; d="scan'208";a="7638489" Received: from unknown (HELO tang.cn.fujitsu.com) ([10.167.250.3]) by song.cn.fujitsu.com with ESMTP; 22 Jun 2013 16:48:35 +0800 Received: from fnstmail02.fnst.cn.fujitsu.com (tang.cn.fujitsu.com [127.0.0.1]) by tang.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id r5M8pTp6002348; Sat, 22 Jun 2013 16:51:29 +0800 Received: from G08FNSTD100614.fnst.cn.fujitsu.com ([10.167.233.156]) by fnstmail02.fnst.cn.fujitsu.com (Lotus Domino Release 8.5.3) with ESMTP id 2013062216502045-2388911 ; Sat, 22 Jun 2013 16:50:20 +0800 From: Hu Tao To: qemu-devel Date: Sat, 22 Jun 2013 16:50:18 +0800 Message-Id: X-Mailer: git-send-email 1.8.3.1 In-Reply-To: References: X-MIMETrack: Itemize by SMTP Server on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/06/22 16:50:20, Serialize by Router on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/06/22 16:50:21, Serialize complete at 2013/06/22 16:50:21 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 222.73.24.84 Cc: Peter Crosthwaite , "Michael S. Tsirkin" , Jason Baron , Anthony Liguori , Alex Williamson , Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH 06/26] q35: use type-safe cast instead of directly access of parent dev X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org And remove variables if possible. Cc: "Michael S. Tsirkin" Cc: Paolo Bonzini Cc: Alex Williamson Cc: Anthony Liguori Cc: Jason Baron Signed-off-by: Hu Tao --- hw/pci-host/q35.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index bbecee6..bb5d506 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -36,7 +36,7 @@ static void q35_host_realize(DeviceState *dev, Error **errp) { - PCIHostState *pci = DO_UPCAST(PCIHostState, busdev.qdev, dev); + PCIHostState *pci = PCI_HOST_BRIDGE(dev); Q35PCIHost *s = Q35_HOST_DEVICE(dev); SysBusDevice *b = SYS_BUS_DEVICE(dev); @@ -104,9 +104,8 @@ static const TypeInfo q35_host_info = { static void mch_update_pciexbar(MCHPCIState *mch) { PCIDevice *pci_dev = &mch->d; - BusState *bus = qdev_get_parent_bus(&pci_dev->qdev); + BusState *bus = qdev_get_parent_bus(DEVICE(pci_dev)); DeviceState *qdev = bus->parent; - Q35PCIHost *s = Q35_HOST_DEVICE(qdev); uint64_t pciexbar; int enable; @@ -138,18 +137,19 @@ static void mch_update_pciexbar(MCHPCIState *mch) break; } addr = pciexbar & addr_mask; - pcie_host_mmcfg_update(&s->host, enable, addr, length); + pcie_host_mmcfg_update(PCIE_HOST_BRIDGE(qdev), enable, addr, length); } /* PAM */ static void mch_update_pam(MCHPCIState *mch) { + PCIDevice *pd = PCI_DEVICE(mch); int i; memory_region_transaction_begin(); for (i = 0; i < 13; i++) { pam_update(&mch->pam_regions[i], i, - mch->d.config[MCH_HOST_BRIDGE_PAM0 + ((i + 1) / 2)]); + pd->config[MCH_HOST_BRIDGE_PAM0 + ((i + 1) / 2)]); } memory_region_transaction_commit(); } @@ -157,8 +157,10 @@ static void mch_update_pam(MCHPCIState *mch) /* SMRAM */ static void mch_update_smram(MCHPCIState *mch) { + PCIDevice *pd = PCI_DEVICE(mch); + memory_region_transaction_begin(); - smram_update(&mch->smram_region, mch->d.config[MCH_HOST_BRDIGE_SMRAM], + smram_update(&mch->smram_region, pd->config[MCH_HOST_BRDIGE_SMRAM], mch->smm_enabled); memory_region_transaction_commit(); } @@ -166,9 +168,10 @@ static void mch_update_smram(MCHPCIState *mch) static void mch_set_smm(int smm, void *arg) { MCHPCIState *mch = arg; + PCIDevice *pd = PCI_DEVICE(mch); memory_region_transaction_begin(); - smram_set_smm(&mch->smm_enabled, smm, mch->d.config[MCH_HOST_BRDIGE_SMRAM], + smram_set_smm(&mch->smm_enabled, smm, pd->config[MCH_HOST_BRDIGE_SMRAM], &mch->smram_region); memory_region_transaction_commit(); }