From patchwork Tue Jun 18 09:08:56 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 252190 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 052DF2C009D for ; Tue, 18 Jun 2013 19:09:49 +1000 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uorv3-0004BA-3F; Tue, 18 Jun 2013 09:09:41 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uorv0-0001OX-3G; Tue, 18 Jun 2013 09:09:38 +0000 Received: from smtp20.mail.ru ([94.100.176.173]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uorux-0001Ng-Bb for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2013 09:09:36 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=Message-Id:Date:Subject:Cc:To:From; bh=+nkOvVdvjrYvEcUeG+sbd9fGM9wt+IadxoArvH2Sp1c=; b=b6BcpbeJkGwA1Q+UwotxnaC9eE3YWHe2gWEh1k1i5V5KWdwSyb24xSIVEe+NjuKYseGZXs4wnKCdJJBO3hYy6AO8m4RexZUIboZDkxkhuNn7hOyu+o/CcaA65XWtMzogpZBV734R7v+cWTQEKvUMwiv9BzuUwPYVdultd+f7ulQ=; Received: from [217.119.30.118] (port=21023 helo=shc.milas.spb.ru) by smtp20.mail.ru with esmtpa (envelope-from ) id 1UoruZ-0003Jd-LM; Tue, 18 Jun 2013 13:09:11 +0400 From: Alexander Shiyan To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: i.MX: Register clock i.MX5x wire1 device Date: Tue, 18 Jun 2013 13:08:56 +0400 Message-Id: <1371546536-19386-1-git-send-email-shc_work@mail.ru> X-Mailer: git-send-email 1.8.1.5 X-Spam: Not detected X-Mras: Ok X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130618_050935_866530_3430CB22 X-CRM114-Status: UNSURE ( 6.98 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.2 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (shc_work[at]mail.ru) -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [94.100.176.173 listed in list.dnswl.org] 0.8 RCVD_IN_SORBS_WEB RBL: SORBS: sender is an abusable web server [217.119.30.118 listed in dnsbl.sorbs.net] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Russell King , Alexander Shiyan , Sascha Hauer X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Signed-off-by: Alexander Shiyan --- arch/arm/mach-imx/clk-imx51-imx53.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index 9afac26..7da8f0d 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -339,6 +339,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk_register_clkdev(clk[epit1_hf_gate], "per", "imx-epit.0"); clk_register_clkdev(clk[epit2_ipg_gate], "ipg", "imx-epit.1"); clk_register_clkdev(clk[epit2_hf_gate], "per", "imx-epit.1"); + clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); /* Set SDHC parents to be PLL2 */ clk_set_parent(clk[esdhc_a_sel], clk[pll2_sw]);