Patchwork [U-Boot] pxa: turn icache off in cpu_init_crit()

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Submitter Mike Dunn
Date June 17, 2013, 5:47 p.m.
Message ID <1371491248-14286-1-git-send-email-mikedunn@newsguy.com>
Download mbox | patch
Permalink /patch/252021/
State Awaiting Upstream
Delegated to: Marek Vasut
Headers show

Comments

Mike Dunn - June 17, 2013, 5:47 p.m.
The comment in the low-level initialization function cpu_init_crit() says that
the caches are being disabled, but (oddly) the icache is actually turned on.
This is probably not a good idea prior to relocating code, so this patch turns
it off.  Tested on the pxa270.

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
---

Because the current code seems quite deliberate in setting the icache bit, I
looked for evidence of an errata on the pxa25x whereby the logic of this bit is
inverted, but couldn't find any.

 arch/arm/cpu/pxa/start.S |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

Patch

diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 2e3f65e..b1deb72 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -208,10 +208,9 @@  cpu_init_crit:
 	 * disable MMU stuff and caches
 	 */
 	mrc	p15, 0, r0, c1, c0, 0
-	bic	r0, r0, #0x00002300	@ clear bits 13, 9:8 (--V- --RS)
+	bic	r0, r0, #0x00003300	@ clear bits 13:12, 9:8 (--VI --RS)
 	bic	r0, r0, #0x00000087	@ clear bits 7, 2:0 (B--- -CAM)
 	orr	r0, r0, #0x00000002	@ set bit 2 (A) Align
-	orr	r0, r0, #0x00001000	@ set bit 12 (I) I-Cache
 	mcr	p15, 0, r0, c1, c0, 0
 
 	mov	pc, lr		/* back to my caller */