From patchwork Mon Jun 17 17:45:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 252019 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2BDB82C0087 for ; Tue, 18 Jun 2013 03:47:56 +1000 (EST) Received: from localhost ([::1]:54489 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UodX0-0000pS-3M for incoming@patchwork.ozlabs.org; Mon, 17 Jun 2013 13:47:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46906) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UodVG-0006ii-AZ for qemu-devel@nongnu.org; Mon, 17 Jun 2013 13:46:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UodVC-0003tD-RZ for qemu-devel@nongnu.org; Mon, 17 Jun 2013 13:46:06 -0400 Received: from mail-yh0-x22d.google.com ([2607:f8b0:4002:c01::22d]:59175) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UodVC-0003sl-NA; Mon, 17 Jun 2013 13:46:02 -0400 Received: by mail-yh0-f45.google.com with SMTP id b20so1105280yha.4 for ; Mon, 17 Jun 2013 10:46:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=IZyBfeMR0qwHG4FI079mShnvLNi5TYvRm9q1I/OvkCI=; b=KyINR1L+QUqgHeS3/Tif4iYEzC8wF0DGYZezpa1P2kolFaP5dPL+/SJqWTMTtAVeJB g/eMYu4xKTgTAl9gEJci2eZoaO+yAvsyIHIpUdVXvg6d/eJuLAO0Ii3RY9UBjVr02KdF ngh4WPQQau//Knt/wduk8qbJSkKpAa6DYK7jmAQj/1rHXg0YuI7GISk2g561ZbkSB5LZ EcqGWr4Tzf/Jn0pj5GTUiKSFvq56NT2g+v6MU7mXMSRdm+Ku6td6HQXpOaWr+oKFjSZu OwSQWaWF+amF4YHwVpK6cv4o+EdSv1/hBJUpd3i26Gg7O22e8n168FHEZbYyMyorFnjt IusQ== X-Received: by 10.236.109.169 with SMTP id s29mr8417002yhg.195.1371491162242; Mon, 17 Jun 2013 10:46:02 -0700 (PDT) Received: from anchor.com (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPSA id g39sm25692426yhb.13.2013.06.17.10.46.00 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 17 Jun 2013 10:46:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 17 Jun 2013 10:45:26 -0700 Message-Id: <1371491129-30246-2-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1371491129-30246-1-git-send-email-rth@twiddle.net> References: <1371491129-30246-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4002:c01::22d Cc: aliguori@us.ibm.com, Anton Blanchard , qemu-stable@nongnu.org Subject: [Qemu-devel] [PULL 1/4] tcg-ppc64: Fix RLDCL opcode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Anton Blanchard The rldcl instruction doesn't have an sh field, so the minor opcode is shifted 1 bit. We were using the XO30 macro which shifted the minor opcode 2 bits. Remove XO30 and add MD30 and MDS30 macros which match the Power ISA categories. Cc: qemu-stable@nongnu.org Signed-off-by: Anton Blanchard Signed-off-by: Richard Henderson --- tcg/ppc64/tcg-target.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 0fcf2b5..c7c0b8f 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -308,7 +308,8 @@ static int tcg_target_const_match (tcg_target_long val, #define OPCD(opc) ((opc)<<26) #define XO19(opc) (OPCD(19)|((opc)<<1)) -#define XO30(opc) (OPCD(30)|((opc)<<2)) +#define MD30(opc) (OPCD(30)|((opc)<<2)) +#define MDS30(opc) (OPCD(30)|((opc)<<1)) #define XO31(opc) (OPCD(31)|((opc)<<1)) #define XO58(opc) (OPCD(58)|(opc)) #define XO62(opc) (OPCD(62)|(opc)) @@ -354,10 +355,10 @@ static int tcg_target_const_match (tcg_target_long val, #define RLWINM OPCD( 21) #define RLWNM OPCD( 23) -#define RLDICL XO30( 0) -#define RLDICR XO30( 1) -#define RLDIMI XO30( 3) -#define RLDCL XO30( 8) +#define RLDICL MD30( 0) +#define RLDICR MD30( 1) +#define RLDIMI MD30( 3) +#define RLDCL MDS30( 8) #define BCLR XO19( 16) #define BCCTR XO19(528)