From patchwork Mon Jun 17 13:59:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Ledvich X-Patchwork-Id: 251901 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D2DE02C008A for ; Tue, 18 Jun 2013 01:05:14 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7F0E44A030; Mon, 17 Jun 2013 17:05:13 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Dw-BwpgoTy9x; Mon, 17 Jun 2013 17:05:13 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 03F664A036; Mon, 17 Jun 2013 17:05:11 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7E01D4A036 for ; Mon, 17 Jun 2013 17:03:56 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id zXQQePxfRiFy for ; Mon, 17 Jun 2013 17:03:50 +0200 (CEST) X-Greylist: delayed 3927 seconds by postgrey-1.27 at theia; Mon, 17 Jun 2013 17:03:45 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from compulab.co.il (softlayer.compulab.co.il [50.23.254.55]) by theia.denx.de (Postfix) with ESMTPS id 353784A030 for ; Mon, 17 Jun 2013 17:03:45 +0200 (CEST) Received: from [82.166.188.245] (port=30448 helo=zimbra-mta.compulab.co.il) by softlayer.compulab.co.il with esmtp (Exim 4.80.1) (envelope-from ) id 1UoZwm-00016h-Ug; Mon, 17 Jun 2013 16:58:17 +0300 Received: from localhost (localhost.localdomain [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id 4F121644198; Mon, 17 Jun 2013 16:58:16 +0300 (IDT) X-Virus-Scanned: amavisd-new at compulab.co.il Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Z-f0ymRdGcMk; Mon, 17 Jun 2013 16:58:15 +0300 (IDT) Received: from ilya-pc (ilya-pc.compulab.local [10.1.1.23]) by zimbra-mta.compulab.co.il (Postfix) with ESMTPS id A85AF644192; Mon, 17 Jun 2013 16:58:15 +0300 (IDT) Received: from ilya by ilya-pc with local (Exim 4.76) (envelope-from ) id 1UoZxy-0002CM-Uf; Mon, 17 Jun 2013 16:59:31 +0300 From: Ilya Ledvich To: u-boot@lists.denx.de, Tom Rini Date: Mon, 17 Jun 2013 16:59:27 +0300 Message-Id: <1371477567-8418-1-git-send-email-ilya@compulab.co.il> X-Mailer: git-send-email 1.7.9.5 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - softlayer.compulab.co.il X-AntiAbuse: Original Domain - lists.denx.de X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - compulab.co.il X-Get-Message-Sender-Via: softlayer.compulab.co.il: acl_c_relayhosts_text_entry: ilya@compulab.co.il|compulab.co.il X-Mailman-Approved-At: Mon, 17 Jun 2013 17:05:09 +0200 Cc: Ilya Ledvich Subject: [U-Boot] [PATCH] am33xx: fix the ddr_cmdtctrl structure X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Fix the wrong mapping between the DDR I/O control registers on AM33XX SoCs and the software representation in the SPL code. The most recent public TRM defines the following DDR I/O control registers offsets: * ddr_cmd0_ioctrl : offset 0x44E11404 * ddr_cmd1_ioctrl : offset 0x44E11408 * ddr_cmd2_ioctrl : offset 0x44E1140C * ddr_data0_ioctrl: offset 0x44E11440 * ddr_data1_ioctrl: offset 0x44E11444 While the struct ddr_cmdtctrl has also some reserved bits in the beginning. The struct is mapped to the address 0x44E11404. As a result "cm0ioctl" points to the ddr_cmd1_ioctrl register, "cm1ioctl" to the ddr_cmd2_ioctrl and etc. Registers ddr_cmd0_ioctrl and ddr_data0_ioctrl are never configured because of this mapping mismatch. Signed-off-by: Ilya Ledvich Reviewed-by: Peter Korsgaard --- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index fb4e78e..a529460 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -267,7 +267,6 @@ void config_ddr_data(const struct ddr_data *data, int nr); * This structure represents the DDR io control on AM33XX devices. */ struct ddr_cmdtctrl { - unsigned int resv1[1]; unsigned int cm0ioctl; unsigned int cm1ioctl; unsigned int cm2ioctl;