From patchwork Mon Jun 17 10:51:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josh Wu X-Patchwork-Id: 251808 X-Patchwork-Delegate: andreas.biessmann@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 669512C0299 for ; Mon, 17 Jun 2013 20:53:27 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DDF394A18A; Mon, 17 Jun 2013 12:53:25 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id J+95TNnaiMUX; Mon, 17 Jun 2013 12:53:25 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 066EE4A191; Mon, 17 Jun 2013 12:53:19 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7AEAB4A189 for ; Mon, 17 Jun 2013 12:53:16 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id zg6x49zloJxn for ; Mon, 17 Jun 2013 12:53:11 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from eusmtp01.atmel.com (eusmtp01.atmel.com [212.144.249.243]) by theia.denx.de (Postfix) with ESMTPS id 2FE1F4A17C for ; Mon, 17 Jun 2013 12:53:04 +0200 (CEST) Received: from apsmtp01.atmel.com (10.168.254.30) by eusmtp01.atmel.com (10.161.101.31) with Microsoft SMTP Server id 14.2.342.3; Mon, 17 Jun 2013 12:53:03 +0200 Received: from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.corp.atmel.com (10.168.254.30) with Microsoft SMTP Server id 14.2.342.3; Mon, 17 Jun 2013 18:53:56 +0800 From: Josh Wu To: Date: Mon, 17 Jun 2013 18:51:17 +0800 Message-ID: <1371466281-31922-2-git-send-email-josh.wu@atmel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1371466281-31922-1-git-send-email-josh.wu@atmel.com> References: <1371466281-31922-1-git-send-email-josh.wu@atmel.com> MIME-Version: 1.0 Cc: scottwood@freescale.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 1/5] ARM: at91: atmel_nand: pmecc driver will select the galois table by sector size X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Define the galois index table offset in chip head file. So user do not need to set by himself. Driver will set it correctly according to sector_size. Signed-off-by: Josh Wu --- arch/arm/include/asm/arch-at91/at91sam9x5.h | 6 ++++++ doc/README.atmel_pmecc | 14 -------------- drivers/mtd/nand/atmel_nand.c | 5 ++++- include/configs/at91sam9x5ek.h | 1 - include/configs/sama5d3xek.h | 1 - 5 files changed, 10 insertions(+), 17 deletions(-) diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5.h b/arch/arm/include/asm/arch-at91/at91sam9x5.h index 85e42f5..de9fa50 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9x5.h +++ b/arch/arm/include/asm/arch-at91/at91sam9x5.h @@ -165,6 +165,12 @@ #define ATMEL_ID_UHP ATMEL_ID_UHPHS /* + * PMECC table in ROM + */ +#define ATMEL_PMECC_INDEX_OFFSET_512 0x8000 +#define ATMEL_PMECC_INDEX_OFFSET_1024 0x10000 + +/* * at91sam9x5 specific prototypes */ #ifndef __ASSEMBLY__ diff --git a/doc/README.atmel_pmecc b/doc/README.atmel_pmecc index b483744..41f3bd7 100644 --- a/doc/README.atmel_pmecc +++ b/doc/README.atmel_pmecc @@ -19,17 +19,6 @@ To use PMECC in this driver, the user needs to set: It can be 2, 4, 8, 12 or 24. 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. It only can be 512 or 1024. - 3. The PMECC index lookup table's offsets in ROM code: CONFIG_PMECC_INDEX_TABLE_OFFSET. - In the chip datasheet section "Boot Stragegies", you can find - two Galois Field Table in the ROM code. One table is for 512-bytes - sector. Another is for 1024-byte sector. Each Galois Field includes - two sub-table: indext table & alpha table. - In the beginning of each Galois Field Table is the index table, - Alpha table is in the following. - So the index table's offset is same as the Galois Field Table. - - Please set CONFIG_PMECC_INDEX_TABLE_OFFSET correctly according the - Galois Field Table's offset base on the sector size you used. Take AT91SAM9X5EK as an example, the board definition file likes: @@ -38,7 +27,4 @@ Take AT91SAM9X5EK as an example, the board definition file likes: #define CONFIG_ATMEL_NAND_HW_PMECC 1 #define CONFIG_PMECC_CAP 2 #define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 -NOTE: If you use 1024 as the sector size, then need set 0x10000 as the - CONFIG_PMECC_INDEX_TABLE_OFFSET diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 3bfbaf8..139a479 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -653,7 +653,10 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand, cap = host->pmecc_corr_cap = CONFIG_PMECC_CAP; sector_size = host->pmecc_sector_size = CONFIG_PMECC_SECTOR_SIZE; - host->pmecc_index_table_offset = CONFIG_PMECC_INDEX_TABLE_OFFSET; + if (host->pmecc_sector_size == 512) + host->pmecc_index_table_offset = ATMEL_PMECC_INDEX_OFFSET_512; + else + host->pmecc_index_table_offset = ATMEL_PMECC_INDEX_OFFSET_1024; MTDDEBUG(MTD_DEBUG_LEVEL1, "Initialize PMECC params, cap: %d, sector: %d\n", diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index ee6e3fc..4364026 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -137,7 +137,6 @@ #define CONFIG_ATMEL_NAND_HW_PMECC 1 #define CONFIG_PMECC_CAP 2 #define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 #define CONFIG_MTD_DEVICE #define CONFIG_CMD_MTDPARTS diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index c13e983..67f8180 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -142,7 +142,6 @@ #define CONFIG_ATMEL_NAND_HW_PMECC #define CONFIG_PMECC_CAP 4 #define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_PMECC_INDEX_TABLE_OFFSET ATMEL_PMECC_INDEX_OFFSET_512 #define CONFIG_CMD_NAND_TRIMFFS #endif