From patchwork Sun Jun 16 19:07:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sandra Loosemore X-Patchwork-Id: 251734 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 411D32C0091 for ; Mon, 17 Jun 2013 05:07:51 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; q= dns; s=default; b=iPqY0wjJfxbR82fNmS+iP4VNaAhlL8qW9rcPytiEdOrzU9 HhUOGmdw0UfFMJGRo0QSeEDAbve6w1UOTJqUalz+oqdcrpldh9hLWPgHOIvsFVJ3 iCcIXdcBGjr8vkKEPTOozL48f6sKZAPccU8c/Onx+RdRCrEx1x6himl1Y2WPA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; s= default; bh=2PUz2cB3GvCWX7aKiJVWlKyXDsA=; b=Ru6w5VSdNvbqpubimI3s vXZDBOwyjwARpYtMx03Q3NbmH68AAi9NX6Vj4mZfR+10TipfBKjLsbelLeUN+Ht3 BDO1XIwn/m8lgGAhSklkjFiGgKJ3gqgX1xA7PN2Q+0pdo3u+UmFG1en07Nw1fqI0 kCgLuJViZqBBfVPowf0xdcI= Received: (qmail 21320 invoked by alias); 16 Jun 2013 19:07:45 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 21308 invoked by uid 89); 16 Jun 2013 19:07:44 -0000 X-Spam-SWARE-Status: No, score=-3.4 required=5.0 tests=AWL, BAYES_00, KHOP_RCVD_UNTRUST, RCVD_IN_HOSTKARMA_W, RCVD_IN_HOSTKARMA_WL autolearn=ham version=3.3.1 Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Sun, 16 Jun 2013 19:07:44 +0000 Received: from svr-orw-exc-10.mgc.mentorg.com ([147.34.98.58]) by relay1.mentorg.com with esmtp id 1UoIIg-0005KU-RI from Sandra_Loosemore@mentor.com ; Sun, 16 Jun 2013 12:07:42 -0700 Received: from SVR-ORW-FEM-03.mgc.mentorg.com ([147.34.97.39]) by SVR-ORW-EXC-10.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.4675); Sun, 16 Jun 2013 12:07:42 -0700 Received: from [IPv6:::1] (147.34.91.1) by svr-orw-fem-03.mgc.mentorg.com (147.34.97.39) with Microsoft SMTP Server id 14.2.247.3; Sun, 16 Jun 2013 12:07:12 -0700 Message-ID: <51BE0CE8.40504@codesourcery.com> Date: Sun, 16 Jun 2013 13:07:20 -0600 From: Sandra Loosemore User-Agent: Mozilla/5.0 (X11; Linux i686; rv:17.0) Gecko/20130329 Thunderbird/17.0.5 MIME-Version: 1.0 To: GCC Patches , Richard Biener Subject: [patch 2/5] hoist -fstrict-volatile-bitfields test X-Virus-Found: No This patch makes parallel changes to store_bit_field_1 and extract_bit_field_1 to skip some register shortcuts if -fstrict-volatile-bitfields applies. By itself, it doesn't fix any of the new test cases added in part 5, but it's required in conjunction with part 3 to make the new volatile-bitfields-3.c test pass on some targets (specifically, x86_64). This part of the patch series has already been approved, but since it's probably not useful without the other pieces, I'm deferring checking it in for now. -Sandra Index: gcc/expmed.c =================================================================== --- gcc/expmed.c (revision 199963) +++ gcc/expmed.c (working copy) @@ -810,15 +810,15 @@ store_bit_field_1 (rtx str_rtx, unsigned return true; /* If OP0 is a memory, try copying it to a register and seeing if a - cheap register alternative is available. */ - if (MEM_P (op0)) + cheap register alternative is available. Do not try these tricks if + -fstrict-volatile-bitfields is in effect, since they may not respect + the mode of the access. */ + if (MEM_P (op0) + && !(MEM_VOLATILE_P (op0) + && flag_strict_volatile_bitfields > 0)) { - /* Do not use unaligned memory insvs for volatile bitfields when - -fstrict-volatile-bitfields is in effect. */ - if (!(MEM_VOLATILE_P (op0) - && flag_strict_volatile_bitfields > 0) - && get_best_mem_extraction_insn (&insv, EP_insv, bitsize, bitnum, - fieldmode) + if (get_best_mem_extraction_insn (&insv, EP_insv, bitsize, bitnum, + fieldmode) && store_bit_field_using_insv (&insv, op0, bitsize, bitnum, value)) return true; @@ -1592,14 +1592,14 @@ extract_bit_field_1 (rtx str_rtx, unsign } /* If OP0 is a memory, try copying it to a register and seeing if a - cheap register alternative is available. */ - if (MEM_P (op0)) + cheap register alternative is available. Do not try these tricks if + -fstrict-volatile-bitfields is in effect, since they may not respect + the mode of the access. */ + if (MEM_P (op0) + && !(MEM_VOLATILE_P (op0) && flag_strict_volatile_bitfields > 0)) { - /* Do not use extv/extzv for volatile bitfields when - -fstrict-volatile-bitfields is in effect. */ - if (!(MEM_VOLATILE_P (op0) && flag_strict_volatile_bitfields > 0) - && get_best_mem_extraction_insn (&extv, pattern, bitsize, bitnum, - tmode)) + if (get_best_mem_extraction_insn (&extv, pattern, bitsize, bitnum, + tmode)) { rtx result = extract_bit_field_using_extv (&extv, op0, bitsize, bitnum, unsignedp,