From patchwork Sat Jun 15 22:02:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=C3=BCrgen_Urban?= X-Patchwork-Id: 251641 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 953F82C009A for ; Sun, 16 Jun 2013 08:02:40 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:message-id:from:to:cc:subject:content-type:date :in-reply-to:references; q=dns; s=default; b=nLjVMEzKdUhVUaf+hjM 80a6voxd8fMDoG6R3F07mKAygRyeoX5J49NuleXWdBUYF7SwU87VFPr8CThOqEiR AWh9LR5v1Q839ZbAgbh70W1K+zvDYc/6Gce+zgjxRJHqI0KX0SZAMCpMv/gj/sPZ 2sfFThyjJSEQRurxmiy8L5GI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:message-id:from:to:cc:subject:content-type:date :in-reply-to:references; s=default; bh=ADJMPIk9yebwyQN18dZ3PhIRM NA=; b=Q+q2A8DBrkbdcb7njnUnQWhCdqOhyPbDi9rosb6VvrPOpSZ5+Ou8LdLLL 7h/HFelncfObDFf+QO7Wuqdb52knXVKsbbIHUqft1zUZArsHofTXDZaLkaf56dUu OXw+FRm4BSauDmDji3IJsEak8F1DgMUqEiM3ETYsbVKnds9Ca0= Received: (qmail 16679 invoked by alias); 15 Jun 2013 22:02:33 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 16644 invoked by uid 89); 15 Jun 2013 22:02:30 -0000 X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, KHOP_THREADED, RCVD_IN_DNSWL_NONE, RCVD_IN_HOSTKARMA_NO, SPF_PASS autolearn=ham version=3.3.1 Received: from mout.gmx.net (HELO mout.gmx.net) (212.227.17.22) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Sat, 15 Jun 2013 22:02:29 +0000 Received: from 3capp-gmx-bs52.server.lan ([172.19.170.105]) by mrigmx.server.lan (mrigmx002) with ESMTP (Nemesis) id 0M06kM-1USsKk0rGO-00uKsl; Sun, 16 Jun 2013 00:02:26 +0200 Received: from [84.178.23.248] by 3capp-gmx-bs52.server.lan with HTTP; Sun Jun 16 00:02:26 CEST 2013 MIME-Version: 1.0 Message-ID: From: =?UTF-8?Q?=22J=C3=BCrgen_Urban=22?= To: "Richard Sandiford" Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] MIPS r5900, --with-llsc=? Date: Sun, 16 Jun 2013 00:02:26 +0200 (CEST) Sensitivity: Normal In-Reply-To: <87k3lz5ecn.fsf@talisman.default> References: <87zjv77ygt.fsf@talisman.default> , <87k3lz5ecn.fsf@talisman.default> X-UI-Message-Type: mail X-Virus-Found: No Hello Richard, > >> > How much other changes will be currently accepted here? There is other > >> > stuff which I want to prepare and submit here, e.g.: > >> > 3. fix use of ll/sc in libgomp, either increase mips ISA level or use > >> > syscall (which is broken in Linux 2.6.35.4). The attached patch fixes problem 3. libgomp was not the cause of the problem. When linux is detected in gcc/config.gcc, the variable "with_llsc" is set to "yes". This happens before the CPU is checked. I fixed this by storing the original parameter. I think this is better than moving the code up. The patch for gcc/config/mips/mips.h fixes that ".set mips2" wasn't used when with_llsc=yes was configured. The patch for gcc/config/mips/mips.c gets lld and scd working. These instructions are normally not emulated by the Linux kernel and the syscall only supports 32 bit. So I changed my kernel to support lld and scd. On the long term I plan to use registers k0 or k1 as address registers for the instructions lb, lw, ld, lq, sb, sw, sd and sq which was suggested for the PS2 in an old paper, because the registers are changed by the kernel on interrupts. There were measurements which showed much performance improvement on the PS2 when no illegal instructions are used. Best regards Jürgen Index: gcc/config.gcc =================================================================== --- gcc/config.gcc (Revision 199708) +++ gcc/config.gcc (Arbeitskopie) @@ -297,6 +297,9 @@ ;; esac +# Save parameter --with-llsc for later check. +param_llsc="$with_llsc" + # Set default cpu_type, tm_file, tm_p_file and xm_file so it can be # updated in each machine entry. Also set default extra_headers for some # machines. @@ -2985,7 +2988,7 @@ mips64r5900-*-* | mips64r5900el-*-* | mipsr5900-*-* | mipsr5900el-*-*) with_arch=r5900 with_tune=r5900 - if test x$with_llsc = x; then + if test x$param_llsc = x; then # r5900 doesn't support ll, sc, lld and scd instructions: with_llsc=no fi Index: gcc/config/mips/mips.c =================================================================== --- gcc/config/mips/mips.c (Revision 199708) +++ gcc/config/mips/mips.c (Arbeitskopie) @@ -12463,7 +12463,11 @@ if (!ISA_HAS_LL_SC) { output_asm_insn (".set\tpush", 0); - output_asm_insn (".set\tmips2", 0); + if (TARGET_64BIT) { + output_asm_insn (".set\tmips3", 0); + } else { + output_asm_insn (".set\tmips2", 0); + } } } Index: gcc/config/mips/mips.h =================================================================== --- gcc/config/mips/mips.h (Revision 199708) +++ gcc/config/mips/mips.h (Arbeitskopie) @@ -1063,7 +1081,7 @@ /* ISA includes ll and sc. Note that this implies ISA_HAS_SYNC because the expanders use both ISA_HAS_SYNC and ISA_HAS_LL_SC instructions. */ -#define ISA_HAS_LL_SC (mips_isa >= 2 && !TARGET_MIPS16) +#define ISA_HAS_LL_SC (mips_isa >= 2 && !TARGET_MIPS16 && !TARGET_MIPS5900) #define GENERATE_LL_SC \ (target_flags_explicit & MASK_LLSC \ ? TARGET_LLSC && !TARGET_MIPS16 \