Patchwork MIPS r5900, --with-llsc=?

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Submitter Jürgen Urban
Date June 15, 2013, 10:02 p.m.
Message ID <trinity-e0097e11-1f04-49d7-b9a1-d7cf12df2709-1371333746006@3capp-gmx-bs52>
Download mbox | patch
Permalink /patch/251641/
State New
Headers show

Comments

Jürgen Urban - June 15, 2013, 10:02 p.m.
Hello Richard,

> >> > How much other changes will be currently accepted here? There is other
> >> > stuff which I want to prepare and submit here, e.g.:

> >> > 3. fix use of ll/sc in libgomp, either increase mips ISA level or use
> >> > syscall (which is broken in Linux 2.6.35.4).

The attached patch fixes problem 3. libgomp was not the cause of the problem. When linux is detected in gcc/config.gcc, the variable "with_llsc" is set to "yes". This happens before the CPU is checked. I fixed this by storing the original parameter. I think this is better than moving the code up.

The patch for gcc/config/mips/mips.h fixes that ".set mips2" wasn't used when with_llsc=yes was configured.

The patch for gcc/config/mips/mips.c gets lld and scd working. These instructions are normally not emulated by the Linux kernel and the syscall only supports 32 bit. So I changed my kernel to support lld and scd. On the long term I plan to use registers k0 or k1 as address registers for the instructions lb, lw, ld, lq, sb, sw, sd and sq which was suggested for the PS2 in an old paper, because the registers are changed by the kernel on interrupts. There were measurements which showed much performance improvement on the PS2 when no illegal instructions are used.

Best regards
Jürgen

Patch

Index: gcc/config.gcc
===================================================================
--- gcc/config.gcc	(Revision 199708)
+++ gcc/config.gcc	(Arbeitskopie)
@@ -297,6 +297,9 @@ 
 	;;
 esac
 
+# Save parameter --with-llsc for later check.
+param_llsc="$with_llsc"
+
 # Set default cpu_type, tm_file, tm_p_file and xm_file so it can be
 # updated in each machine entry.  Also set default extra_headers for some
 # machines.
@@ -2985,7 +2988,7 @@ 
     mips64r5900-*-* | mips64r5900el-*-* | mipsr5900-*-* | mipsr5900el-*-*)
       with_arch=r5900
       with_tune=r5900
-      if test x$with_llsc = x; then
+      if test x$param_llsc = x; then
 	# r5900 doesn't support ll, sc, lld and scd instructions:
 	with_llsc=no
       fi
Index: gcc/config/mips/mips.c
===================================================================
--- gcc/config/mips/mips.c	(Revision 199708)
+++ gcc/config/mips/mips.c	(Arbeitskopie)
@@ -12463,7 +12463,11 @@ 
   if (!ISA_HAS_LL_SC)
     {
       output_asm_insn (".set\tpush", 0);
-      output_asm_insn (".set\tmips2", 0);
+      if (TARGET_64BIT) {
+        output_asm_insn (".set\tmips3", 0);
+      } else {
+        output_asm_insn (".set\tmips2", 0);
+      }
     }
 }
 
Index: gcc/config/mips/mips.h
===================================================================
--- gcc/config/mips/mips.h	(Revision 199708)
+++ gcc/config/mips/mips.h	(Arbeitskopie)
@@ -1063,7 +1081,7 @@ 
 /* ISA includes ll and sc.  Note that this implies ISA_HAS_SYNC
    because the expanders use both ISA_HAS_SYNC and ISA_HAS_LL_SC
    instructions.  */
-#define ISA_HAS_LL_SC (mips_isa >= 2 && !TARGET_MIPS16)
+#define ISA_HAS_LL_SC (mips_isa >= 2 && !TARGET_MIPS16 && !TARGET_MIPS5900)
 #define GENERATE_LL_SC			\
   (target_flags_explicit & MASK_LLSC	\
    ? TARGET_LLSC && !TARGET_MIPS16	\