From patchwork Fri Jun 14 07:30:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leon Alrae X-Patchwork-Id: 251250 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A14EE2C009C for ; Fri, 14 Jun 2013 17:33:49 +1000 (EST) Received: from localhost ([::1]:43174 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UnOW3-0000eD-A0 for incoming@patchwork.ozlabs.org; Fri, 14 Jun 2013 03:33:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37961) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UnOVZ-0000dc-4l for qemu-devel@nongnu.org; Fri, 14 Jun 2013 03:33:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UnOVV-0006Cp-3B for qemu-devel@nongnu.org; Fri, 14 Jun 2013 03:33:17 -0400 Received: from multi.imgtec.com ([194.200.65.239]:8170) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UnOVU-0005vc-U3 for qemu-devel@nongnu.org; Fri, 14 Jun 2013 03:33:13 -0400 From: Leon Alrae To: Date: Fri, 14 Jun 2013 08:30:48 +0100 Message-ID: <1371195048-19618-7-git-send-email-leon.alrae@imgtec.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1371195048-19618-1-git-send-email-leon.alrae@imgtec.com> References: <1371195048-19618-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.14.85] X-SEF-Processed: 7_3_0_01192__2013_06_14_08_33_01 X-detected-operating-system: by eggs.gnu.org: Windows XP X-Received-From: 194.200.65.239 Cc: yongbok.kim@imgtec.com, cristian.cuna@imgtec.com, leon.alrae@imgtec.com, paul.burton@imgtec.com, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 6/6] pflash_cfi01: duplicate status byte from bits 23:16 for 32bit reads X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Paul Burton The firmware commonly used with MIPS Malta boards (YAMON) reads the status of the pflash with a 32bit memory access. On real hardware this results in the status byte being mirrored in the upper 16 bits of the read value. For example if the status byte is represented by SS then the hardware reads 0x00SS00SS. The YAMON firmware compares the status against 32bit values expecting the mirrored value and fails without it. Signed-off-by: Paul Burton Signed-off-by: Leon Alrae --- hw/block/pflash_cfi01.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 63d7c99..047ee65 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -186,6 +186,9 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, case 0xe8: /* Write block */ /* Status register read */ ret = pfl->status; + if (width > 2) { + ret |= pfl->status << 16; + } DPRINTF("%s: status %x\n", __func__, ret); break; case 0x90: