Patchwork [v2] piix: fix some printf errors when debug is enabled

login
register
mail settings
Submitter Hu Tao
Date June 14, 2013, 7:11 a.m.
Message ID <1371193890-1098-1-git-send-email-hutao@cn.fujitsu.com>
Download mbox | patch
Permalink /patch/251241/
State New
Headers show

Comments

Hu Tao - June 14, 2013, 7:11 a.m.
And use PRIxxx macros if possible.

Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
 cputlb.c        |  4 ++--
 hw/acpi/piix4.c | 12 ++++++------
 2 files changed, 8 insertions(+), 8 deletions(-)
Michael Tokarev - June 14, 2013, 7:19 a.m.
14.06.2013 11:11, Hu Tao wrote:
> And use PRIxxx macros if possible.
> 
> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
> ---
>  cputlb.c        |  4 ++--
>  hw/acpi/piix4.c | 12 ++++++------
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/cputlb.c b/cputlb.c
> index 86666c8..1230e9e 100644
> --- a/cputlb.c
> +++ b/cputlb.c
> @@ -262,8 +262,8 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr,
>  
>  #if defined(DEBUG_TLB)
>      printf("tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x" TARGET_FMT_plx
> -           " prot=%x idx=%d pd=0x%08lx\n",
> -           vaddr, paddr, prot, mmu_idx, pd);
> +           " prot=%x idx=%d\n",
> +           vaddr, paddr, prot, mmu_idx);
>  #endif

This one hunk has already been posted by Hervé Poussineau in this message:

From: Hervé Poussineau <hpoussin@reactos.org>
Date: Wed,  5 Jun 2013 20:16:42 +0800
Message-Id: <1370434603-5394-1-git-send-email-hpoussin@reactos.org>
Subject: [Qemu-trivial] [PATCH] cputlb: fix debug logs

I questioned it because the `pd' thing hasn't been really removed
but moved into a different structure instead, and we should either
ask subsystem maintainers to fix it or remove the whole thing.
This is debugging stuff, which is needed by someone who actually
understands the subsystem and understands the debugging output
too.  If the debugging isn't needed (and since it does not compile
for quite some time, it obviously isn't used), let's get rid of
whole thing instead.

Unfortunately no one replied to that my email so far.  Adding Cc
BlueSwirl again, in a hope...

Thanks,

/mjt
Michael Tokarev - June 14, 2013, 10:27 a.m.
14.06.2013 11:11, Hu Tao wrote:
> And use PRIxxx macros if possible.

Thanks, applied to the trivial patches queue, on top of the patch
by Hervé Poussineau which I mentioned before.

/mjt
Hu Tao - June 17, 2013, 2:09 a.m.
On Fri, Jun 14, 2013 at 02:27:38PM +0400, Michael Tokarev wrote:
> 14.06.2013 11:11, Hu Tao wrote:
> > And use PRIxxx macros if possible.
> 
> Thanks, applied to the trivial patches queue, on top of the patch
> by Hervé Poussineau which I mentioned before.
> 
> /mjt

Thanks!

Patch

diff --git a/cputlb.c b/cputlb.c
index 86666c8..1230e9e 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -262,8 +262,8 @@  void tlb_set_page(CPUArchState *env, target_ulong vaddr,
 
 #if defined(DEBUG_TLB)
     printf("tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x" TARGET_FMT_plx
-           " prot=%x idx=%d pd=0x%08lx\n",
-           vaddr, paddr, prot, mmu_idx, pd);
+           " prot=%x idx=%d\n",
+           vaddr, paddr, prot, mmu_idx);
 #endif
 
     address = vaddr;
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index e6525ac..756df3b 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -518,7 +518,7 @@  static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width)
     PIIX4PMState *s = opaque;
     uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr);
 
-    PIIX4_DPRINTF("gpe read %x == %x\n", addr, val);
+    PIIX4_DPRINTF("gpe read %" HWADDR_PRIx " == %" PRIu32 "\n", addr, val);
     return val;
 }
 
@@ -530,7 +530,7 @@  static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
     acpi_gpe_ioport_writeb(&s->ar, addr, val);
     pm_update_sci(s);
 
-    PIIX4_DPRINTF("gpe write %x <== %d\n", addr, val);
+    PIIX4_DPRINTF("gpe write %" HWADDR_PRIx " <== %" PRIu64 "\n", addr, val);
 }
 
 static const MemoryRegionOps piix4_gpe_ops = {
@@ -553,15 +553,15 @@  static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
         /* Manufacture an "up" value to cause a device check on any hotplug
          * slot with a device.  Extra device checks are harmless. */
         val = s->pci0_slot_device_present & s->pci0_hotplug_enable;
-        PIIX4_DPRINTF("pci_up_read %x\n", val);
+        PIIX4_DPRINTF("pci_up_read %" PRIu32 "\n", val);
         break;
     case PCI_DOWN_BASE - PCI_HOTPLUG_ADDR:
         val = s->pci0_status.down;
-        PIIX4_DPRINTF("pci_down_read %x\n", val);
+        PIIX4_DPRINTF("pci_down_read %" PRIu32 "\n", val);
         break;
     case PCI_EJ_BASE - PCI_HOTPLUG_ADDR:
         /* No feature defined yet */
-        PIIX4_DPRINTF("pci_features_read %x\n", val);
+        PIIX4_DPRINTF("pci_features_read %" PRIu32 "\n", val);
         break;
     case PCI_RMV_BASE - PCI_HOTPLUG_ADDR:
         val = s->pci0_hotplug_enable;
@@ -579,7 +579,7 @@  static void pci_write(void *opaque, hwaddr addr, uint64_t data,
     switch (addr) {
     case PCI_EJ_BASE - PCI_HOTPLUG_ADDR:
         acpi_piix_eject_slot(opaque, (uint32_t)data);
-        PIIX4_DPRINTF("pciej write %" HWADDR_PRIx " <== % " PRIu64 "\n",
+        PIIX4_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n",
                       addr, data);
         break;
     default: