Message ID | 1371121176-20256-11-git-send-email-juhosg@openwrt.org |
---|---|
State | Accepted |
Delegated to: | Daniel Schwierzeck |
Headers | show |
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S index e871d13..ee80d35 100644 --- a/arch/mips/cpu/mips32/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -172,16 +172,16 @@ NESTED(mips_cache_reset, 0, ra) */ move a1, t2 move a2, t8 - PTR_LA t7, mips_init_icache - jalr t7 + PTR_LA v1, mips_init_icache + jalr v1 /* * then initialize D-cache. */ move a1, t3 move a2, t8 - PTR_LA t7, mips_init_dcache - jalr t7 + PTR_LA v1, mips_init_dcache + jalr v1 jr RA END(mips_cache_reset)
Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> --- arch/mips/cpu/mips32/cache.S | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)