From patchwork Wed Mar 25 10:08:19 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Grandegger X-Patchwork-Id: 25070 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [18.85.46.34]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 78373DDE1C for ; Wed, 25 Mar 2009 21:17:59 +1100 (EST) Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1LmQ9D-0003HQ-Ep; Wed, 25 Mar 2009 10:15:47 +0000 Received: from mail-out.m-online.net ([212.18.0.9]) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1LmQ25-0001oD-Aj for linux-mtd@lists.infradead.org; Wed, 25 Mar 2009 10:08:35 +0000 Received: from mail01.m-online.net (mail.m-online.net [192.168.3.149]) by mail-out.m-online.net (Postfix) with ESMTP id 675481C155DD; Wed, 25 Mar 2009 11:10:53 +0100 (CET) X-Auth-Info: FDfK63+MctaSiHv/8jcUT+8sgMTdpAlBi+HqEgBdhYY= Received: from mail.denx.de (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTP id 7EE2E90171; Wed, 25 Mar 2009 11:08:22 +0100 (CET) Received: from pollux.denx.de (pollux [192.168.1.1]) by mail.denx.de (Postfix) with ESMTP id 50D4A410A896; Wed, 25 Mar 2009 11:08:22 +0100 (CET) Received: by pollux.denx.de (Postfix, from userid 504) id 196E11011C355; Wed, 25 Mar 2009 11:08:22 +0100 (CET) From: Wolfgang Grandegger To: linux-mtd@lists.infradead.org, linuxppc-dev@ozlabs.org Subject: [PATCH v3 2/4] NAND: FSL-UPM: Add wait flags to support board/chip specific delays Date: Wed, 25 Mar 2009 11:08:19 +0100 Message-Id: <1237975701-23201-3-git-send-email-wg@grandegger.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <1237975701-23201-2-git-send-email-wg@grandegger.com> References: <1237975701-23201-1-git-send-email-wg@grandegger.com> <1237975701-23201-2-git-send-email-wg@grandegger.com> X-Bad-Reply: References and In-Reply-To but no 'Re:' in Subject. X-Spam-Score: 0.0 (/) X-Mailman-Approved-At: Wed, 25 Mar 2009 06:15:45 -0400 Cc: Anton Vorontsov , Wolfgang Grandegger X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The NAND flash on the TQM8548_BE modules requires a short delay after running the UPM pattern. The TQM8548_BE requires a further short delay after writing out a buffer. Normally the R/B pin should be checked, but it's not connected on the TQM8548_BE. The existing driver uses similar fixed delay points. To manage these extra delays in a more general way, I introduced the "wait-flags" property allowing the board-specific driver to specify various types of extra delay. Signed-off-by: Wolfgang Grandegger Acked-by: Anton Vorontsov --- drivers/mtd/nand/fsl_upm.c | 20 ++++++++++++++++++-- 1 files changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index 9b314ce..3ecfc1e 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c @@ -23,6 +23,10 @@ #include #include +#define FSL_UPM_WAIT_RUN_PATTERN 0x1 +#define FSL_UPM_WAIT_WRITE_BYTE 0x2 +#define FSL_UPM_WAIT_WRITE_BUFFER 0x4 + struct fsl_upm_nand { struct device *dev; struct mtd_info mtd; @@ -41,6 +45,7 @@ struct fsl_upm_nand { uint32_t num_chips; uint32_t chip_number; uint32_t chip_offset; + uint32_t wait_flags; }; #define to_fsl_upm_nand(mtd) container_of(mtd, struct fsl_upm_nand, mtd) @@ -97,7 +102,8 @@ static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) mar |= fun->chip_number * fun->chip_offset; fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar); - fun_wait_rnb(fun); + if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN) + fun_wait_rnb(fun); } static void fun_select_chip(struct mtd_info *mtd, int chip_nr) @@ -139,8 +145,11 @@ static void fun_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) for (i = 0; i < len; i++) { out_8(fun->chip.IO_ADDR_W, buf[i]); - fun_wait_rnb(fun); + if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE) + fun_wait_rnb(fun); } + if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER) + fun_wait_rnb(fun); } static int __devinit fun_chip_init(struct fsl_upm_nand *fun, @@ -285,6 +294,13 @@ static int __devinit fun_probe(struct of_device *ofdev, if (prop && size == sizeof(uint32_t)) fun->chip_offset = *prop; + prop = of_get_property(ofdev->node, "fsl,upm-wait-flags", &size); + if (prop && size == sizeof(uint32_t)) + fun->wait_flags = *prop; + else + fun->wait_flags = + FSL_UPM_WAIT_RUN_PATTERN | FSL_UPM_WAIT_WRITE_BYTE; + fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start, io_res.end - io_res.start + 1); if (!fun->io_base) {