From patchwork Wed Mar 25 10:08:20 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Grandegger X-Patchwork-Id: 25066 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id F0B2EDE274 for ; Wed, 25 Mar 2009 21:09:21 +1100 (EST) X-Original-To: linuxppc-dev@ozlabs.org Delivered-To: linuxppc-dev@ozlabs.org Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by ozlabs.org (Postfix) with ESMTP id BBC09DDDFA for ; Wed, 25 Mar 2009 21:08:24 +1100 (EST) Received: from mail01.m-online.net (mail.m-online.net [192.168.3.149]) by mail-out.m-online.net (Postfix) with ESMTP id 531261C02266; Wed, 25 Mar 2009 11:08:20 +0100 (CET) X-Auth-Info: FDfK63+MctaSiHv/8jcUT+8sgMTdpAlBi+HqEgBdhYY= Received: from mail.denx.de (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTP id C520D90053; Wed, 25 Mar 2009 11:08:22 +0100 (CET) Received: from pollux.denx.de (pollux [192.168.1.1]) by mail.denx.de (Postfix) with ESMTP id 52686410A898; Wed, 25 Mar 2009 11:08:22 +0100 (CET) Received: by pollux.denx.de (Postfix, from userid 504) id 1C4591011C356; Wed, 25 Mar 2009 11:08:22 +0100 (CET) From: Wolfgang Grandegger To: linux-mtd@lists.infradead.org, linuxppc-dev@ozlabs.org Subject: [PATCH v3 3/4] powerpc: NAND: FSL UPM: document new bindings Date: Wed, 25 Mar 2009 11:08:20 +0100 Message-Id: <1237975701-23201-4-git-send-email-wg@grandegger.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <1237975701-23201-3-git-send-email-wg@grandegger.com> References: <1237975701-23201-1-git-send-email-wg@grandegger.com> <1237975701-23201-2-git-send-email-wg@grandegger.com> <1237975701-23201-3-git-send-email-wg@grandegger.com> X-BeenThere: linuxppc-dev@ozlabs.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org This patch adds documentation for the new NAND FSL UPM bindings for: NAND: FSL-UPM: add multi chip support NAND: FSL-UPM: Add wait flags to support board/chip specific delays Signed-off-by: Wolfgang Grandegger Acked-by: Anton Vorontsov --- .../powerpc/dts-bindings/fsl/upm-nand.txt | 39 +++++++++++++++++++- 1 files changed, 37 insertions(+), 2 deletions(-) diff --git a/Documentation/powerpc/dts-bindings/fsl/upm-nand.txt b/Documentation/powerpc/dts-bindings/fsl/upm-nand.txt index 84a04d5..0272e70 100644 --- a/Documentation/powerpc/dts-bindings/fsl/upm-nand.txt +++ b/Documentation/powerpc/dts-bindings/fsl/upm-nand.txt @@ -5,9 +5,22 @@ Required properties: - reg : should specify localbus chip select and size used for the chip. - fsl,upm-addr-offset : UPM pattern offset for the address latch. - fsl,upm-cmd-offset : UPM pattern offset for the command latch. -- gpios : may specify optional GPIO connected to the Ready-Not-Busy pin. -Example: +Optional properties: +- fsl,upm-wait-flags : add chip-dependent short delays after running the + UPM pattern (0x1), after writing a data byte (0x2) + or after writing out a buffer (0x4). +- gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins + (R/B#). For multi-chip devices, "num-chips" GPIO definitions are + required. +- chip-delay : chip dependent delay for transfering data from array to + read registers (tR). Required if property "gpios" is not + used (R/B# pins not connected). +- num-chips : number of chips per device for multi-chip support. +- chip-offset : address offset between chips for multi-chip support. The + corresponding address lines are used to select the chip. + +Examples: upm@1,0 { compatible = "fsl,upm-nand"; @@ -26,3 +39,25 @@ upm@1,0 { }; }; }; + +upm@3,0 { + compatible = "fsl,upm-nand"; + reg = <3 0x0 0x800>; + fsl,upm-addr-offset = <0x10>; + fsl,upm-cmd-offset = <0x08>; + fsl,upm-wait-flags = <0x5>; + /* Multi-chip device */ + num-chips = <2>; + chip-offset = <0x200>; + chip-delay = <25>; // in micro-seconds + + nand@0 { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fs"; + reg = <0x00000000 0x10000000>; + }; + }; +};