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[v2,5/5] intc/xilinx_intc: Dont lower IRQ when HIE cleared

Message ID 02a048dc3f653f372a572d30afa37eb6b63c2269.1370911981.git.peter.crosthwaite@xilinx.com
State New
Headers show

Commit Message

Peter Crosthwaite June 11, 2013, 1 a.m. UTC 
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

This is a little strange. It is lowering the parent IRQ pin on input
when HIE is cleared. There is no such behaviour in the real hardware.

ISR changes based on interrupt pin state are already guarded on HIE
being set. So we can just delete this if in its entirety.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---

 hw/intc/xilinx_intc.c | 5 -----
 1 file changed, 5 deletions(-)
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Patch

diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
index e9121cd..f343ee0 100644
--- a/hw/intc/xilinx_intc.c
+++ b/hw/intc/xilinx_intc.c
@@ -147,11 +147,6 @@  static void irq_handler(void *opaque, int irq, int level)
 {
     struct xlx_pic *p = opaque;
 
-    if (!(p->regs[R_MER] & 2)) {
-        qemu_irq_lower(p->parent_irq);
-        return;
-    }
-
     /* edge triggered interrupt */
     if (p->c_kind_of_intr & (1 << irq) && p->regs[R_MER] & 2) {
         p->regs[R_ISR] |= (level << irq);