Patchwork [1/2] i2c-mv64xxx: Fix timing issue on Armada XP (errata FE-8471889)

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Submitter Gregory CLEMENT
Date June 7, 2013, 3:48 p.m.
Message ID <1370620140-17177-2-git-send-email-gregory.clement@free-electrons.com>
Download mbox | patch
Permalink /patch/249748/
State Changes Requested
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Comments

Gregory CLEMENT - June 7, 2013, 3:48 p.m.
From: Zbigniew Bodek <zbb@semihalf.com>

All the Armada XP (mv78230, mv78260 and mv78460) have a silicon issue
in the I2C controller which violate the i2c repeated start
timing. The I2C standard requires a minimum of 4.7us for the repeated
start condition whereas the I2C controller of the Armada XP this time
is 2.9us.

So this patch adds a 5us delay for the start case only if the
mv64xxx_i2c_errata_delay flag is set.

[gregory.clement@free-electrons.com: Merge the incoming commits into
this single one]
[gregory.clement@free-electrons.com: Reword the commit log]

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Zbigniew Bodek <zbb@semihalf.com>
---
 drivers/i2c/busses/i2c-mv64xxx.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
Thomas Petazzoni - June 7, 2013, 4:25 p.m.
Dear Gregory CLEMENT,

On Fri,  7 Jun 2013 17:48:59 +0200, Gregory CLEMENT wrote:

> +/*
> + * 5us delay in order to avoid repeated start
> + * timing violation on Armada XP SoC.
> + */
> +static int mv64xxx_i2c_errata_delay;

This should probably be a per-I2C controller variable, i.e in
mv64xxx_i2c_data.


> +	if (!mv64xxx_i2c_errata_delay &&
> +	    of_machine_is_compatible("marvell,armadaxp"))
> +		mv64xxx_i2c_errata_delay = 1;

I am wondering whether it should be done this way, or using a separate
DT property.

Best regards,

Thomas
Wolfram Sang - June 14, 2013, 3:24 p.m.
On Fri, Jun 07, 2013 at 06:25:00PM +0200, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
> 
> On Fri,  7 Jun 2013 17:48:59 +0200, Gregory CLEMENT wrote:
> 
> > +/*
> > + * 5us delay in order to avoid repeated start
> > + * timing violation on Armada XP SoC.
> > + */
> > +static int mv64xxx_i2c_errata_delay;
> 
> This should probably be a per-I2C controller variable, i.e in
> mv64xxx_i2c_data.

Yes.

> 
> 
> > +	if (!mv64xxx_i2c_errata_delay &&
> > +	    of_machine_is_compatible("marvell,armadaxp"))
> > +		mv64xxx_i2c_errata_delay = 1;
> 
> I am wondering whether it should be done this way, or using a separate
> DT property.

Need to think about it. It is similar to the sda-hold-time issue, I
guess.

Patch

diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 1a3abd6..60cac9f 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -23,6 +23,7 @@ 
 #include <linux/of_i2c.h>
 #include <linux/clk.h>
 #include <linux/err.h>
+#include <linux/delay.h>
 
 /* Register defines */
 #define	MV64XXX_I2C_REG_SLAVE_ADDR			0x00
@@ -59,6 +60,12 @@ 
 #define	MV64XXX_I2C_STATUS_MAST_RD_ADDR_2_NO_ACK	0xe8
 #define	MV64XXX_I2C_STATUS_NO_STATUS			0xf8
 
+/*
+ * 5us delay in order to avoid repeated start
+ * timing violation on Armada XP SoC.
+ */
+static int mv64xxx_i2c_errata_delay;
+
 /* Driver states */
 enum {
 	MV64XXX_I2C_STATE_INVALID,
@@ -252,6 +259,9 @@  mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
 		writel(drv_data->cntl_bits,
 			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
 		drv_data->block = 0;
+		if (mv64xxx_i2c_errata_delay)
+			udelay(5);
+
 		wake_up(&drv_data->waitq);
 		break;
 
@@ -300,6 +310,9 @@  mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
 			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
 		drv_data->block = 0;
+		if (mv64xxx_i2c_errata_delay)
+			udelay(5);
+
 		wake_up(&drv_data->waitq);
 		break;
 
@@ -592,6 +605,10 @@  mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
 	 * So hard code the value to 1 second.
 	 */
 	drv_data->adapter.timeout = HZ;
+
+	if (!mv64xxx_i2c_errata_delay &&
+	    of_machine_is_compatible("marvell,armadaxp"))
+		mv64xxx_i2c_errata_delay = 1;
 out:
 	return rc;
 #endif