Patchwork [U-Boot] Origen: Set FIMD as the default display path

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Submitter Tushar Behera
Date June 7, 2013, 10:56 a.m.
Message ID <1370602582-6332-2-git-send-email-tushar.behera@linaro.org>
Download mbox | patch
Permalink /patch/249665/
State Not Applicable
Delegated to: Minkyu Kang
Headers show

Comments

Tushar Behera - June 7, 2013, 10:56 a.m.
On EXYNOS4210, there are three paths for display data to be processed,
namely MIE, MDNIE and FIMD. On Origen board, FIMD display controller
is used.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
---
This patch is rebased on master branch of u-boot-samsung tree.

 board/samsung/origen/lowlevel_init.S |   13 +++++++++++++
 board/samsung/origen/origen_setup.h  |    7 +++++++
 2 files changed, 20 insertions(+)
Minkyu Kang - Aug. 6, 2013, 2:59 a.m.
Dear Tushar Behera,

On 07/06/13 19:56, Tushar Behera wrote:
> On EXYNOS4210, there are three paths for display data to be processed,
> namely MIE, MDNIE and FIMD. On Origen board, FIMD display controller
> is used.
> 
> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> ---
> This patch is rebased on master branch of u-boot-samsung tree.
> 
>  board/samsung/origen/lowlevel_init.S |   13 +++++++++++++
>  board/samsung/origen/origen_setup.h  |    7 +++++++
>  2 files changed, 20 insertions(+)
> 

Since the lowlevel_init.S is removed, this patch cannot be applied.

Thanks,
Minkyu Kang.
Tushar Behera - Aug. 6, 2013, 3:07 a.m.
On 08/06/2013 08:29 AM, Minkyu Kang wrote:
> Dear Tushar Behera,
> 
> On 07/06/13 19:56, Tushar Behera wrote:
>> On EXYNOS4210, there are three paths for display data to be processed,
>> namely MIE, MDNIE and FIMD. On Origen board, FIMD display controller
>> is used.
>>
>> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
>> ---
>> This patch is rebased on master branch of u-boot-samsung tree.
>>
>>  board/samsung/origen/lowlevel_init.S |   13 +++++++++++++
>>  board/samsung/origen/origen_setup.h  |    7 +++++++
>>  2 files changed, 20 insertions(+)
>>
> 
> Since the lowlevel_init.S is removed, this patch cannot be applied.
> 

I will rebase to current tip and send again.

> Thanks,
> Minkyu Kang.
> 

Thanks.
Ajay kumar - Aug. 6, 2013, 8:51 a.m.
+Donghwa Lee


Hi Tushar,

I think this setting already exists for Exynos4 in u-boot.

Are you not getting display without your patch?

Have a look at this:
http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/exynos/system.c;h=ad12445832cf7415e52e8593b595ab33a0b4d375;hb=HEAD#l33


Regards,
Ajay Kumar


On Tue, Aug 6, 2013 at 12:07 PM, Tushar Behera <tushar.behera@linaro.org>wrote:

> On 08/06/2013 08:29 AM, Minkyu Kang wrote:
> > Dear Tushar Behera,
> >
> > On 07/06/13 19:56, Tushar Behera wrote:
> >> On EXYNOS4210, there are three paths for display data to be processed,
> >> namely MIE, MDNIE and FIMD. On Origen board, FIMD display controller
> >> is used.
> >>
> >> Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
> >> ---
> >> This patch is rebased on master branch of u-boot-samsung tree.
> >>
> >>  board/samsung/origen/lowlevel_init.S |   13 +++++++++++++
> >>  board/samsung/origen/origen_setup.h  |    7 +++++++
> >>  2 files changed, 20 insertions(+)
> >>
> >
> > Since the lowlevel_init.S is removed, this patch cannot be applied.
> >
>
> I will rebase to current tip and send again.
>
> > Thanks,
> > Minkyu Kang.
> >
>
> Thanks.
> --
> Tushar Behera
> _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
Tushar Behera - Aug. 6, 2013, 10:40 a.m.
On 6 August 2013 14:21, Ajay kumar <ajaynumb@gmail.com> wrote:
> +Donghwa Lee
>
>
> Hi Tushar,
>
> I think this setting already exists for Exynos4 in u-boot.
>

No, there was no display on Origen board without this patch.

> Are you not getting display without your patch?
>
> Have a look at this:
> http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/exynos/system.c;h=ad12445832cf7415e52e8593b595ab33a0b4d375;hb=HEAD#l33
>

Thanks for the pointer. Let me check if I am missing anything for
Origen u-boot code.
Tushar Behera - Aug. 15, 2013, 10:09 a.m.
On 6 August 2013 16:10, Tushar Behera <tushar.behera@linaro.org> wrote:
> On 6 August 2013 14:21, Ajay kumar <ajaynumb@gmail.com> wrote:
>> +Donghwa Lee
>>
>>
>> Hi Tushar,
>>
>> I think this setting already exists for Exynos4 in u-boot.
>>
>
> No, there was no display on Origen board without this patch.
>
>> Are you not getting display without your patch?
>>
>> Have a look at this:
>> http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/exynos/system.c;h=ad12445832cf7415e52e8593b595ab33a0b4d375;hb=HEAD#l33
>>
>
> Thanks for the pointer. Let me check if I am missing anything for
> Origen u-boot code.
>

This code is called if CONFIG_LCD is enabled. Calling
set_system_display_ctrl() from Origen board_init() fixes my problem.

Thanks.

Patch

diff --git a/board/samsung/origen/lowlevel_init.S b/board/samsung/origen/lowlevel_init.S
index be9d418..a7ea680 100644
--- a/board/samsung/origen/lowlevel_init.S
+++ b/board/samsung/origen/lowlevel_init.S
@@ -89,6 +89,7 @@  lowlevel_init:
 	bl uart_asm_init
 	bl arch_cpu_init
 	bl tzpc_init
+	bl display_init
 	pop	{pc}
 
 wakeup_reset:
@@ -96,6 +97,7 @@  wakeup_reset:
 	bl mem_ctrl_asm_init
 	bl arch_cpu_init
 	bl tzpc_init
+	bl display_init
 
 exit_wakeup:
 	/* Load return address and jump to kernel */
@@ -355,3 +357,14 @@  uart_asm_init:
 	nop
 	nop
 
+/* Setting default display path to FIMD */
+display_init:
+	push	{lr}
+	ldr	r0, =EXYNOS4_SYSREG_BASE
+
+	/* DISPLAY_CONTROL */
+	ldr	r1, =DISPLAY_CONTROL_VAL
+	ldr	r2, =DISPLAY_CONTROL_OFFSET
+	str	r1, [r0, r2]
+
+	pop	{pc}
diff --git a/board/samsung/origen/origen_setup.h b/board/samsung/origen/origen_setup.h
index 926a4cc..b0e1bc2 100644
--- a/board/samsung/origen/origen_setup.h
+++ b/board/samsung/origen/origen_setup.h
@@ -83,6 +83,8 @@ 
 #define VPLL_CON0_OFFSET	0xC120
 #define VPLL_CON1_OFFSET	0xC124
 
+#define DISPLAY_CONTROL_OFFSET	0x210
+
 /* DMC: DRAM Controllor Register offsets */
 #define DMC_CONCONTROL		0x00
 #define DMC_MEMCONTROL		0x04
@@ -485,6 +487,11 @@ 
 				| (VPLL_MRR << 24) \
 				| (VPLL_MFR << 16) \
 				| (VPLL_K << 0))
+
+/* DISPLAY_CONTROL */
+#define FIMDBYPASS_LBLK0	0x1
+#define DISPLAY_CONTROL_VAL	(FIMDBYPASS_LBLK0 << 1)
+
 /*
  * UART GPIO_A0/GPIO_A1 Control Register Value
  * 0x2: UART Function