Patchwork [U-Boot,8/8] powerpc/p1022ds: boot from spi flash with SPL

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Submitter ying.zhang@freescale.com
Date June 7, 2013, 9:25 a.m.
Message ID <1370597119-19401-4-git-send-email-ying.zhang@freescale.com>
Download mbox | patch
Permalink /patch/249640/
State Superseded
Delegated to: Andy Fleming
Headers show

Comments

ying.zhang@freescale.com - June 7, 2013, 9:25 a.m.
From: Ying Zhang <b40530@freescale.com>

Support to boot from spi flash.

This patch is on top of the patch:
powerpc/p1022ds: boot from SD Card with SPL

Signed-off-by: Ying Zhang <b40530@freescale.com>
---
 board/freescale/p1022ds/spl.c  |   12 +++++-
 drivers/mtd/spi/Makefile       |    1 +
 drivers/mtd/spi/fsl_espi_spl.c |   79 ++++++++++++++++++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash.c    |    2 +
 include/configs/P1022DS.h      |   36 +++++++++++++++----
 5 files changed, 121 insertions(+), 9 deletions(-)
 create mode 100644 drivers/mtd/spi/fsl_espi_spl.c
Andy Fleming - June 19, 2013, 4:36 p.m.
On Fri, Jun 7, 2013 at 4:25 AM, <ying.zhang@freescale.com> wrote:

> From: Ying Zhang <b40530@freescale.com>
>
> Support to boot from spi flash.
>
> This patch is on top of the patch:
> powerpc/p1022ds: boot from SD Card with SPL
>
> Signed-off-by: Ying Zhang <b40530@freescale.com>
> ---
>  board/freescale/p1022ds/spl.c  |   12 +++++-
>  drivers/mtd/spi/Makefile       |    1 +
>  drivers/mtd/spi/fsl_espi_spl.c |   79
> ++++++++++++++++++++++++++++++++++++++++
>  drivers/mtd/spi/spi_flash.c    |    2 +
>  include/configs/P1022DS.h      |   36 +++++++++++++++----
>


These should probably be divided into two patches. One to add the
capability (in drivers/mtd), and one to enable the capability (in the
p1022-specific files).

I'd like jagan's ack before applying this, but if you split this patch, and
he agrees, I'd be happy to take this in through my tree.

Andy
Zhang Ying-B40530 - June 21, 2013, 10:12 a.m.
From: Andy Fleming [mailto:afleming@gmail.com]
Sent: Thursday, June 20, 2013 12:37 AM
To: Zhang Ying-B40530; jagannadha.sutradharudu-teki@xilinx.com
Cc: U-Boot list; Wood Scott-B07421; Xie Xiaobo-R63061; Zhang Ying-B40530
Subject: Re: [PATCH 8/8] powerpc/p1022ds: boot from spi flash with SPL



On Fri, Jun 7, 2013 at 4:25 AM, <ying.zhang@freescale.com<mailto:ying.zhang@freescale.com>> wrote:
From: Ying Zhang <b40530@freescale.com<mailto:b40530@freescale.com>>

Support to boot from spi flash.

This patch is on top of the patch:
powerpc/p1022ds: boot from SD Card with SPL

Signed-off-by: Ying Zhang <b40530@freescale.com<mailto:b40530@freescale.com>>
---
 board/freescale/p1022ds/spl.c  |   12 +++++-
 drivers/mtd/spi/Makefile       |    1 +
 drivers/mtd/spi/fsl_espi_spl.c |   79 ++++++++++++++++++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash.c    |    2 +
 include/configs/P1022DS.h      |   36 +++++++++++++++----


These should probably be divided into two patches. One to add the capability (in drivers/mtd), and one to enable the capability (in the p1022-specific files).

I'd like jagan's ack before applying this, but if you split this patch, and he agrees, I'd be happy to take this in through my tree.
[Zhang Ying]
This should be no problem. It will be modified with other review comment in the next version(v6).
Now the most important is the patch "[PATCH 07/10 v5] powerpc/p1022ds: boot from SD Card with SPL",
Please review as soon as possible,  I had waiting long.
Thanks.

Patch

diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c
index 40f000f..1dd9050 100644
--- a/board/freescale/p1022ds/spl.c
+++ b/board/freescale/p1022ds/spl.c
@@ -21,13 +21,12 @@ 
 
 #include <common.h>
 #include <ns16550.h>
-#include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
 #include <malloc.h>
 #include <mmc.h>
 #include <i2c.h>
 #include "../common/ngpixis.h"
 #include <fsl_esdhc.h>
+#include <spi_flash.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -54,6 +53,11 @@  void board_init_f(ulong bootflag)
 	setbits_be32(&gur->pmuxcr,
 		in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
 
+#ifdef CONFIG_SPL_SPI_BOOT
+	/* Enable the SPI */
+	clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI);
+#endif
+
 	/* Read back the register to synchronize the write. */
 	in_be32(&gur->pmuxcr);
 
@@ -67,6 +71,8 @@  void board_init_f(ulong bootflag)
 			bus_clk / 16 / CONFIG_BAUDRATE);
 #ifdef CONFIG_SPL_MMC_BOOT
 	puts("\nSD boot...\n");
+#elif defined(CONFIG_SPL_SPI_BOOT)
+       puts("\nSPI Flash boot...\n");
 #endif
 
 	/* copy code to RAM and jump to it - this should not return */
@@ -108,5 +114,7 @@  void board_init_r(gd_t *gd, ulong dest_addr)
 
 #ifdef CONFIG_SPL_MMC_BOOT
 	mmc_boot();
+#elif defined(CONFIG_SPL_SPI_BOOT)
+	spi_boot();
 #endif
 }
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 90f8392..5f130d5 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -27,6 +27,7 @@  LIB	:= $(obj)libspi_flash.o
 
 ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_SPL_SPI_LOAD)	+= spi_spl_load.o
+COBJS-$(CONFIG_SPL_SPI_BOOT)	+= fsl_espi_spl.o
 endif
 
 COBJS-$(CONFIG_SPI_FLASH)	+= spi_flash.o
diff --git a/drivers/mtd/spi/fsl_espi_spl.c b/drivers/mtd/spi/fsl_espi_spl.c
new file mode 100644
index 0000000..75ffc8a
--- /dev/null
+++ b/drivers/mtd/spi/fsl_espi_spl.c
@@ -0,0 +1,79 @@ 
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <spi_flash.h>
+#include <malloc.h>
+
+#define ESPI_BOOT_IMAGE_SIZE	0x48
+#define ESPI_BOOT_IMAGE_ADDR	0x50
+#define CONFIG_CFG_DATA_SECTOR	0
+
+/*
+ * The main entry for SPI booting. It's necessary that SDRAM is already
+ * configured and available since this code loads the main U-Boot image
+ * from SPI into SDRAM and starts it from there.
+ */
+void spi_boot(void)
+{
+	void (*uboot)(void) __noreturn;
+	u32 offset, code_len, i;
+	unsigned char *buf = NULL;
+	struct spi_flash *flash;
+
+	flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
+			CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
+	if (flash == NULL) {
+		puts("\nspi_flash_probe failed");
+		hang();
+	}
+
+	/*
+	* Load U-Boot image from SPI flash into RAM
+	*/
+	buf = malloc(flash->page_size);
+	if (buf == NULL) {
+		puts("\nmalloc failed");
+		hang();
+	}
+	memset(buf, 0, flash->page_size);
+
+	spi_flash_read(flash, CONFIG_CFG_DATA_SECTOR, \
+			flash->page_size, (void *)buf);
+	offset = *(u32 *)(buf + ESPI_BOOT_IMAGE_ADDR);
+	/* Skip spl code */
+	offset += CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS;
+	/* Get the code size from offset 0x48 */
+	code_len = *(u32 *)(buf + ESPI_BOOT_IMAGE_SIZE);
+	/* Skip spl code */
+	code_len = code_len - CONFIG_SPL_MAX_SIZE;
+	/* copy code to DDR */
+	spi_flash_read(flash, offset, code_len, \
+			(void *)CONFIG_SYS_SPI_FLASH_U_BOOT_DST);
+	/*
+	* Jump to U-Boot image
+	*/
+	flush_cache(CONFIG_SYS_SPI_FLASH_U_BOOT_DST, \
+			code_len);
+	uboot = (void *) CONFIG_SYS_SPI_FLASH_U_BOOT_START;
+	(*uboot)();
+}
+
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 111185a..8cac488 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -432,12 +432,14 @@  struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 		goto err_manufacturer_probe;
 	}
 #endif
+#ifndef CONFIG_SPL_BUILD
 	printf("SF: Detected %s with page size ", flash->name);
 	print_size(flash->sector_size, ", total ");
 	print_size(flash->size, "");
 	if (flash->memory_map)
 		printf(", mapped at %p", flash->memory_map);
 	puts("\n");
+#endif
 
 	spi_release_bus(spi);
 
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index b881bad..8fd9e53 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -48,11 +48,33 @@ 
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define CONFIG_RAMBOOT_SPIFLASH
-#define CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW                 /* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE		0x11001000
+#define CONFIG_SPL_TEXT_BASE		0xf8f81000
+#define CONFIG_SPL_PAD_TO		0x18000
+#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_SPI_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
 #endif
 
 #define CONFIG_NAND_FSL_ELBC
@@ -321,7 +343,7 @@ 
  * Config the L2 Cache as L2 SRAM
 */
 #if defined(CONFIG_SPL_BUILD)
-#if defined(CONFIG_SDCARD)
+#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 #define CONFIG_SYS_INIT_L2_ADDR		0xf8f80000
 #define CONFIG_SYS_INIT_L2_ADDR_PHYS	CONFIG_SYS_INIT_L2_ADDR
 #define CONFIG_SYS_L2_SIZE		(256 << 10)
@@ -565,7 +587,7 @@ 
 /*
  * Environment
  */
-#ifdef CONFIG_RAMBOOT_SPIFLASH
+#ifdef CONFIG_SPIFLASH
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_BUS	0
 #define CONFIG_ENV_SPI_CS	0