[v1,5/5] intc/xilinx_intc: Dont lower IRQ when HIE cleared

Submitted by Peter Crosthwaite on June 7, 2013, 2:41 a.m.

Details

Message ID 30bc327d58ce2982813726ccb113d209dccc180f.1370572420.git.peter.crosthwaite@xilinx.com
State New
Headers show

Commit Message

Peter Crosthwaite June 7, 2013, 2:41 a.m.
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

This is a little strange. It is lowering the parent IRQ pin on input
when HIE is cleared. There is no such behaviour in the real hardware.

ISR changes based on interrupt pin state are already guarded on HIE
being set. So we can just delete this if in its entirety.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---

 hw/intc/xilinx_intc.c | 5 -----
 1 file changed, 5 deletions(-)

Patch hide | download patch | download mbox

diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
index ddedfa3..297f537 100644
--- a/hw/intc/xilinx_intc.c
+++ b/hw/intc/xilinx_intc.c
@@ -143,11 +143,6 @@  static void irq_handler(void *opaque, int irq, int level)
 {
     struct xlx_pic *p = opaque;
 
-    if (!(p->regs[R_MER] & 2)) {
-        qemu_irq_lower(p->parent_irq);
-        return;
-    }
-
     /* edge triggered interrupt */
     if (p->c_kind_of_intr & (1 << irq) && p->regs[R_MER] & 2) {
         p->regs[R_ISR] |= (level << irq);