From patchwork Fri Jun 7 02:38:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 249582 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8B2662C0098 for ; Fri, 7 Jun 2013 12:39:41 +1000 (EST) Received: from localhost ([::1]:56045 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UkmaZ-0002Zl-Jx for incoming@patchwork.ozlabs.org; Thu, 06 Jun 2013 22:39:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57338) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UkmaJ-0002Xl-5J for qemu-devel@nongnu.org; Thu, 06 Jun 2013 22:39:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UkmaI-0005ql-9B for qemu-devel@nongnu.org; Thu, 06 Jun 2013 22:39:23 -0400 Received: from mail-pb0-x22c.google.com ([2607:f8b0:400e:c01::22c]:38825) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UkmaI-0005qc-2C for qemu-devel@nongnu.org; Thu, 06 Jun 2013 22:39:22 -0400 Received: by mail-pb0-f44.google.com with SMTP id wz12so4095413pbc.17 for ; Thu, 06 Jun 2013 19:39:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=bb1MRXdYrA07bt3mlWZE6LwXG6J3jACPkd329XrtY5s=; b=bd34tk3dJy92nH9TZQb4eviPrTf/3+AWjrdp4X9QUB33Fh8I7whKhcp7s4ZgPZ7yK0 ut/U9LSlbPGTbnn1v5QXhBNGjYKqK3I9EXEjZSMTKQahWAoGwDvZbkD05+qGoAgmdfAF 5Tnd8P5JPXwWhVNHEsIVw86H9GqZt0cIAbma4VIO4Guim+PDVitdC5t4SvpAULQa3peY uAsZ1VMXMTNerLnAg5SdLAq8JXm4goHPx8tXlma574/7aFuwizZ6D19kTMmwtPBn/SQ0 ZZB2cmE72EMY+rXOCVIZhDldPdZ5tkbaRMvjVf+jtpUJ6+FQyzvjgl6s20nu6Ev6LI8E BOkQ== X-Received: by 10.69.3.65 with SMTP id bu1mr41275793pbd.107.1370572761082; Thu, 06 Jun 2013 19:39:21 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id vv6sm747472pab.6.2013.06.06.19.39.17 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Thu, 06 Jun 2013 19:39:20 -0700 (PDT) From: peter.crosthwaite@xilinx.com To: qemu-devel@nongnu.org Date: Fri, 7 Jun 2013 12:38:47 +1000 Message-Id: <734e40a42d5544050b984019303402432f9e6be5.1370572420.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.8.3.rc1.44.gb387c77.dirty In-Reply-To: References: X-Gm-Message-State: ALoCoQn15eruR34UkO+OoNGVI56xU0/RM6qYnOWZV1FhUDa0kqi6YqrkRkwzA8LIjIYlHhsAe4EK X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c01::22c Cc: edgar.iglesias@gmail.com Subject: [Qemu-devel] [PATCH v1 2/5] intc/xilinx_intc: Don't clear level sens. IRQs without ACK X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Crosthwaite For level sensitive interrupts, ISR bits are cleared when the input pin is lowered. This is incorrect. Only software can clear ISR bits (via IAR or direct write to ISR with !MER(2)). Signed-off-by: Peter Crosthwaite --- hw/intc/xilinx_intc.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 5df7008..d243a00 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -135,13 +135,7 @@ static void irq_handler(void *opaque, int irq, int level) return; } - /* Update source flops. Don't clear unless level triggered. - Edge triggered interrupts only go away when explicitely acked to - the interrupt controller. */ - if (!(p->c_kind_of_intr & (1 << irq)) || level) { - p->regs[R_ISR] &= ~(1 << irq); - p->regs[R_ISR] |= (level << irq); - } + p->regs[R_ISR] |= (level << irq); update_irq(p); }