From patchwork Thu Jun 6 07:34:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 249309 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 1C1FC2C02A1 for ; Thu, 6 Jun 2013 17:36:18 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757599Ab3FFHgQ (ORCPT ); Thu, 6 Jun 2013 03:36:16 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:22483 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753880Ab3FFHgQ (ORCPT ); Thu, 6 Jun 2013 03:36:16 -0400 Received: from 172.24.2.119 (EHLO szxeml210-edg.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.4-GA FastPath queued) with ESMTP id BCW85088; Thu, 06 Jun 2013 15:36:05 +0800 (CST) Received: from SZXEML451-HUB.china.huawei.com (10.82.67.194) by szxeml210-edg.china.huawei.com (172.24.2.183) with Microsoft SMTP Server (TLS) id 14.1.323.7; Thu, 6 Jun 2013 15:35:29 +0800 Received: from localhost (10.135.76.69) by szxeml451-hub.china.huawei.com (10.82.67.194) with Microsoft SMTP Server id 14.1.323.7; Thu, 6 Jun 2013 15:35:23 +0800 From: Yijing Wang To: Bjorn Helgaas CC: Yinghai Lu , , Tony Luck , , Fenghua Yu , Hanjun Guo , , Yijing Wang , John Keller , Jay Lan , Jack Steiner , Mark Maule Subject: [PATCH -v5 1/8] PCI/IA64: SN: remove sn_pci_window_fixup() Date: Thu, 6 Jun 2013 15:34:46 +0800 Message-ID: <1370504093-14908-2-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.11.msysgit.1 In-Reply-To: <1370504093-14908-1-git-send-email-wangyijing@huawei.com> References: <1370504093-14908-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.135.76.69] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently, pcibios_bus_to_resource() and pcibios_resource_to_bus() functions use pci_host_bridge_window in pci_host_bridge to translate bus side to/from cpu side addresses. Pci_window in pci_controller under IA64 is no used again, so it's no need to use sn_pci_window_fixup() to setup pci_window again, remove it. Signed-off-by: Yijing Wang Cc: John Keller Cc: Jay Lan Cc: Jack Steiner Cc: Mark Maule Cc: Tony Luck Cc: Fenghua Yu Cc: linux-ia64@vger.kernel.org --- arch/ia64/sn/kernel/io_init.c | 53 ----------------------------------------- 1 files changed, 0 insertions(+), 53 deletions(-) diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c index 238e2c5..06a172c 100644 --- a/arch/ia64/sn/kernel/io_init.c +++ b/arch/ia64/sn/kernel/io_init.c @@ -149,48 +149,6 @@ sn_legacy_pci_window_fixup(struct pci_controller *controller, } /* - * sn_pci_window_fixup() - Create a pci_window for each device resource. - * It will setup pci_windows for use by - * pcibios_bus_to_resource(), pcibios_resource_to_bus(), - * etc. - */ -static void -sn_pci_window_fixup(struct pci_dev *dev, unsigned int count, - s64 * pci_addrs) -{ - struct pci_controller *controller = PCI_CONTROLLER(dev->bus); - unsigned int i; - unsigned int idx; - unsigned int new_count; - struct pci_window *new_window; - - if (count == 0) - return; - idx = controller->windows; - new_count = controller->windows + count; - new_window = kcalloc(new_count, sizeof(struct pci_window), GFP_KERNEL); - BUG_ON(new_window == NULL); - if (controller->window) { - memcpy(new_window, controller->window, - sizeof(struct pci_window) * controller->windows); - kfree(controller->window); - } - - /* Setup a pci_window for each device resource. */ - for (i = 0; i <= PCI_ROM_RESOURCE; i++) { - if (pci_addrs[i] == -1) - continue; - - new_window[idx].offset = dev->resource[i].start - pci_addrs[i]; - new_window[idx].resource = dev->resource[i]; - idx++; - } - - controller->windows = new_count; - controller->window = new_window; -} - -/* * sn_io_slot_fixup() - We are not running with an ACPI capable PROM, * and need to convert the pci_dev->resource * 'start' and 'end' addresses to mapped addresses, @@ -199,9 +157,7 @@ sn_pci_window_fixup(struct pci_dev *dev, unsigned int count, void sn_io_slot_fixup(struct pci_dev *dev) { - unsigned int count = 0; int idx; - s64 pci_addrs[PCI_ROM_RESOURCE + 1]; unsigned long addr, end, size, start; struct pcidev_info *pcidev_info; struct sn_irq_info *sn_irq_info; @@ -229,7 +185,6 @@ sn_io_slot_fixup(struct pci_dev *dev) for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) { if (!pcidev_info->pdi_pio_mapped_addr[idx]) { - pci_addrs[idx] = -1; continue; } @@ -237,11 +192,8 @@ sn_io_slot_fixup(struct pci_dev *dev) end = dev->resource[idx].end; size = end - start; if (size == 0) { - pci_addrs[idx] = -1; continue; } - pci_addrs[idx] = start; - count++; addr = pcidev_info->pdi_pio_mapped_addr[idx]; addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET; dev->resource[idx].start = addr; @@ -276,11 +228,6 @@ sn_io_slot_fixup(struct pci_dev *dev) IORESOURCE_ROM_BIOS_COPY; } } - /* Create a pci_window in the pci_controller struct for - * each device resource. - */ - if (count > 0) - sn_pci_window_fixup(dev, count, pci_addrs); sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info); }