From patchwork Wed Jun 5 06:01:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 248912 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id ACCC02C009E for ; Wed, 5 Jun 2013 16:05:14 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752048Ab3FEGFG (ORCPT ); Wed, 5 Jun 2013 02:05:06 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:42629 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751777Ab3FEGFB (ORCPT ); Wed, 5 Jun 2013 02:05:01 -0400 Received: from 172.24.2.119 (EHLO szxeml205-edg.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.4-GA FastPath queued) with ESMTP id BCV29557; Wed, 05 Jun 2013 14:04:55 +0800 (CST) Received: from SZXEML449-HUB.china.huawei.com (10.82.67.192) by szxeml205-edg.china.huawei.com (172.24.2.58) with Microsoft SMTP Server (TLS) id 14.1.323.7; Wed, 5 Jun 2013 14:04:32 +0800 Received: from localhost (10.135.76.69) by szxeml449-hub.china.huawei.com (10.82.67.192) with Microsoft SMTP Server id 14.1.323.7; Wed, 5 Jun 2013 14:04:26 +0800 From: Yijing Wang To: Bjorn Helgaas CC: Yinghai Lu , , Tony Luck , , Fenghua Yu , Hanjun Guo , , Yijing Wang , John Keller , Jay Lan , Jack Steiner , Mark Maule Subject: [PATCH -v4 2/8] PCI/IA64: SN: use normal resource instead of pci_window Date: Wed, 5 Jun 2013 14:01:51 +0800 Message-ID: <1370412117-12860-3-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.11.msysgit.1 In-Reply-To: <1370412117-12860-1-git-send-email-wangyijing@huawei.com> References: <1370412117-12860-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.135.76.69] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Pci_window in pci_controller will not be used again, use normal resource instead of pci_window in sn_legacy_pci_window_fixup(), this patch is to prepare remove pci_window in IA64. Signed-off-by: Yijing Wang Cc: John Keller Cc: Jay Lan Cc: Jack Steiner Cc: Mark Maule Cc: Tony Luck Cc: Fenghua Yu Cc: linux-ia64@vger.kernel.org --- arch/ia64/sn/kernel/io_init.c | 56 +++++++++++++++++++---------------------- 1 files changed, 26 insertions(+), 30 deletions(-) diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c index b8ff9ea..d97e2b4 100644 --- a/arch/ia64/sn/kernel/io_init.c +++ b/arch/ia64/sn/kernel/io_init.c @@ -118,34 +118,26 @@ static void __init sn_fixup_ionodes(void) } /* - * sn_pci_legacy_window_fixup - Create PCI controller windows for + * sn_pci_legacy_window_fixup - Setup PCI resources for * legacy IO and MEM space. This needs to * be done here, as the PROM does not have * ACPI support defining the root buses * and their resources (_CRS), */ static void -sn_legacy_pci_window_fixup(struct pci_controller *controller, - u64 legacy_io, u64 legacy_mem) +sn_legacy_pci_window_fixup(struct resource *res, + u64 legacy_io, u64 legacy_mem) { - controller->window = kcalloc(2, sizeof(struct pci_window), - GFP_KERNEL); - BUG_ON(controller->window == NULL); - controller->window[0].offset = legacy_io; - controller->window[0].resource.name = "legacy_io"; - controller->window[0].resource.flags = IORESOURCE_IO; - controller->window[0].resource.start = legacy_io; - controller->window[0].resource.end = - controller->window[0].resource.start + 0xffff; - controller->window[0].resource.parent = &ioport_resource; - controller->window[1].offset = legacy_mem; - controller->window[1].resource.name = "legacy_mem"; - controller->window[1].resource.flags = IORESOURCE_MEM; - controller->window[1].resource.start = legacy_mem; - controller->window[1].resource.end = - controller->window[1].resource.start + (1024 * 1024) - 1; - controller->window[1].resource.parent = &iomem_resource; - controller->windows = 2; + res[0].name = "legacy_io"; + res[0].flags = IORESOURCE_IO; + res[0].start = legacy_io; + res[0].end = res[0].start + 0xffff; + res[0].parent = &ioport_resource; + res[1].name = "legacy_mem"; + res[1].flags = IORESOURCE_MEM; + res[1].start = legacy_mem; + res[1].end = res[1].start + (1024 * 1024) - 1; + res[1].parent = &iomem_resource; } /* @@ -244,8 +236,8 @@ sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) s64 status = 0; struct pci_controller *controller; struct pcibus_bussoft *prom_bussoft_ptr; + struct resource *res; LIST_HEAD(resources); - int i; status = sal_get_pcibus_info((u64) segment, (u64) busnum, (u64) ia64_tpa(&prom_bussoft_ptr)); @@ -257,19 +249,23 @@ sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) BUG_ON(!controller); controller->segment = segment; + res = kcalloc(2, sizeof(struct resource), GFP_KERNEL); + BUG_ON(!res); + /* * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup(). * (platform_data will be overwritten later in sn_common_bus_fixup()) */ controller->platform_data = prom_bussoft_ptr; - sn_legacy_pci_window_fixup(controller, - prom_bussoft_ptr->bs_legacy_io, - prom_bussoft_ptr->bs_legacy_mem); - for (i = 0; i < controller->windows; i++) - pci_add_resource_offset(&resources, - &controller->window[i].resource, - controller->window[i].offset); + sn_legacy_pci_window_fixup(res, + prom_bussoft_ptr->bs_legacy_io, + prom_bussoft_ptr->bs_legacy_mem); + pci_add_resource_offset(&resources, &res[0], + prom_bussoft_ptr->bs_legacy_io); + pci_add_resource_offset(&resources, &res[1], + prom_bussoft_ptr->bs_legacy_mem); + bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, controller, &resources); if (bus == NULL) @@ -280,7 +276,7 @@ sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) return; error_return: - + kfree(res); kfree(controller); return; }