Patchwork powerpc: Align thread->fpr to 16 bytes

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Submitter Anton Blanchard
Date June 5, 2013, 3:02 a.m.
Message ID <20130605130226.59f29836@kryten>
Download mbox | patch
Permalink /patch/248882/
State Accepted, archived
Commit 475e68cfdde39e6d95055999b0cb42fdb2bea0ca
Delegated to: Benjamin Herrenschmidt
Headers show

Comments

Anton Blanchard - June 5, 2013, 3:02 a.m.
On newer CPUs we use VSX loads and stores to the thread->fpr array.
For best performance we need to ensure 16 byte alignment.

Signed-off-by: Anton Blanchard <anton@samba.org>
---

Patch

Index: b/arch/powerpc/include/asm/processor.h
===================================================================
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -200,7 +200,7 @@  struct thread_struct {
 #endif
 #endif
 	/* FP and VSX 0-31 register set */
-	double		fpr[32][TS_FPRWIDTH];
+	double		fpr[32][TS_FPRWIDTH] __attribute__((aligned(16)));
 	struct {
 
 		unsigned int pad;