From patchwork Tue Jun 4 18:57:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jay Agarwal X-Patchwork-Id: 248812 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D622A2C0040 for ; Wed, 5 Jun 2013 04:57:15 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751873Ab3FDS5O (ORCPT ); Tue, 4 Jun 2013 14:57:14 -0400 Received: from hqemgate03.nvidia.com ([216.228.121.140]:8154 "EHLO hqemgate03.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751818Ab3FDS5M (ORCPT ); Tue, 4 Jun 2013 14:57:12 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Tue, 04 Jun 2013 12:03:42 -0700 Received: from hqemhub03.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 04 Jun 2013 11:56:50 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 04 Jun 2013 11:56:50 -0700 Received: from localhost.localdomain (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.298.1; Tue, 4 Jun 2013 11:56:49 -0700 From: Jay Agarwal To: , , , , , , , , , , , , , CC: , , Subject: [PATCH V3 4/4] ARM: tegra: pcie: Enable PCIe controller on Cardhu Date: Wed, 5 Jun 2013 00:27:32 +0530 Message-ID: <1370372252-4332-4-git-send-email-jagarwal@nvidia.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1370372252-4332-1-git-send-email-jagarwal@nvidia.com> References: <1370372252-4332-1-git-send-email-jagarwal@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org - Enable PCIe controller on Cardhu - Only port 2 is connected on this board - Add regulators required for Tegra30 Signed-off-by: Jay Agarwal --- Patch is based on remotes/gitorious_thierryreding_linux/tegra/next and should be applied on top of this. Changes in V3: - Added num-lanes property for cardhu as per review comments arch/arm/boot/dts/tegra30-cardhu.dtsi | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index 8ad4841..b6270e3 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -27,6 +27,24 @@ model = "NVIDIA Tegra30 Cardhu evaluation board"; compatible = "nvidia,cardhu", "nvidia,tegra30"; + pcie-controller { + status = "okay"; + pex-clk-supply = <&pex_hvdd_3v3_reg>; + vdd-supply = <&ldo1_reg>; + avdd-supply = <&ldo2_reg>; + + pci@1,0 { + nvidia,num-lanes = <4>; + }; + pci@2,0 { + nvidia,num-lanes = <1>; + }; + pci@3,0 { + status = "okay"; + nvidia,num-lanes = <1>; + }; + }; + host1x { dc@54200000 { rgb {