| Message ID | 1370336466-14617-1-git-send-email-hs@denx.de |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
On Tue, Jun 04, 2013 at 11:01:06AM +0200, Heiko Schocher wrote: > upcoming support for siemens boards switches mpu pll clk in board > code. So make this configurable. > > Signed-off-by: Heiko Schocher <hs@denx.de> > Cc: Tom Rini <trini@ti.com> Wait, didn't we already something like this posted?
Hello Tom, Am 04.06.2013 23:29, schrieb Tom Rini: > On Tue, Jun 04, 2013 at 11:01:06AM +0200, Heiko Schocher wrote: > >> upcoming support for siemens boards switches mpu pll clk in board >> code. So make this configurable. >> >> Signed-off-by: Heiko Schocher <hs@denx.de> >> Cc: Tom Rini <trini@ti.com> > > Wait, didn't we already something like this posted? Hmm.. did not found something like that, but maybe I missed it. bye, Heiko
On Wed, Jun 05, 2013 at 07:26:45AM +0200, Heiko Schocher wrote: > Hello Tom, > > Am 04.06.2013 23:29, schrieb Tom Rini: > > On Tue, Jun 04, 2013 at 11:01:06AM +0200, Heiko Schocher wrote: > > > >> upcoming support for siemens boards switches mpu pll clk in board > >> code. So make this configurable. > >> > >> Signed-off-by: Heiko Schocher <hs@denx.de> > >> Cc: Tom Rini <trini@ti.com> > > > > Wait, didn't we already something like this posted? > > Hmm.. did not found something like that, but maybe I missed it. I guess we'll chalk it up to never got posted.
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c index a1efc75..9c4d0b4 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c @@ -246,7 +246,7 @@ static void enable_per_clocks(void) ; } -static void mpu_pll_config(void) +void mpu_pll_config_val(int mpull_m) { u32 clkmode, clksel, div_m2; @@ -260,7 +260,7 @@ static void mpu_pll_config(void) ; clksel = clksel & (~CLK_SEL_MASK); - clksel = clksel | ((MPUPLL_M << CLK_SEL_SHIFT) | MPUPLL_N); + clksel = clksel | ((mpull_m << CLK_SEL_SHIFT) | MPUPLL_N); writel(clksel, &cmwkup->clkseldpllmpu); div_m2 = div_m2 & ~CLK_DIV_MASK; @@ -274,6 +274,11 @@ static void mpu_pll_config(void) ; } +static void mpu_pll_config(void) +{ + mpu_pll_config_val(CONFIG_SYS_MPUCLK); +} + static void core_pll_config(void) { u32 clkmode, clksel, div_m4, div_m5, div_m6; diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 2422924..fbeff1a 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -31,6 +31,7 @@ int print_cpuinfo(void); extern struct ctrl_stat *cstat; u32 get_device_type(void); void setup_clocks_for_console(void); +void mpu_pll_config_val(int mpull_m); void ddr_pll_config(unsigned int ddrpll_M); void sdelay(unsigned long);
upcoming support for siemens boards switches mpu pll clk in board code. So make this configurable. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> --- arch/arm/cpu/armv7/am33xx/clock_am33xx.c | 9 +++++++-- arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 + 2 Dateien geändert, 8 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)