diff mbox

[RFC,5/6] KVM: PPC: Book3E: Add ONE_REG AltiVec support

Message ID 1370292868-2697-6-git-send-email-mihai.caraman@freescale.com (mailing list archive)
State RFC
Headers show

Commit Message

Mihai Caraman June 3, 2013, 8:54 p.m. UTC
Add ONE_REG support for AltiVec on Book3E.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
---
 arch/powerpc/kvm/booke.c |   32 ++++++++++++++++++++++++++++++++
 1 files changed, 32 insertions(+), 0 deletions(-)

Comments

Scott Wood June 4, 2013, 10:40 p.m. UTC | #1
On 06/03/2013 03:54:27 PM, Mihai Caraman wrote:
> Add ONE_REG support for AltiVec on Book3E.
> 
> Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
> ---
>  arch/powerpc/kvm/booke.c |   32 ++++++++++++++++++++++++++++++++
>  1 files changed, 32 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
> index 01eb635..019496d 100644
> --- a/arch/powerpc/kvm/booke.c
> +++ b/arch/powerpc/kvm/booke.c
> @@ -1570,6 +1570,22 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu  
> *vcpu, struct kvm_one_reg *reg)
>  	case KVM_REG_PPC_DEBUG_INST:
>  		val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV);
>  		break;
> +#ifdef CONFIG_ALTIVEC
> +	case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
> +		if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
> +			r = -ENXIO;
> +			break;
> +		}
> +		val.vval = vcpu->arch.vr[reg->id - KVM_REG_PPC_VR0];
> +		break;
> +	case KVM_REG_PPC_VSCR:
> +		if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
> +			r = -ENXIO;
> +			break;
> +		}
> +		val = get_reg_val(reg->id, vcpu->arch.vscr.u[3]);
> +		break;

Why u[3]?

-Scott
Caraman Mihai Claudiu-B02008 July 3, 2013, 12:11 p.m. UTC | #2
> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Wednesday, June 05, 2013 1:40 AM
> To: Caraman Mihai Claudiu-B02008
> Cc: kvm-ppc@vger.kernel.org; kvm@vger.kernel.org; linuxppc-
> dev@lists.ozlabs.org; Caraman Mihai Claudiu-B02008
> Subject: Re: [RFC PATCH 5/6] KVM: PPC: Book3E: Add ONE_REG AltiVec
> support
> 
> On 06/03/2013 03:54:27 PM, Mihai Caraman wrote:
> > Add ONE_REG support for AltiVec on Book3E.
> >
> > Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
> > ---
> >  arch/powerpc/kvm/booke.c |   32 ++++++++++++++++++++++++++++++++
> >  1 files changed, 32 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
> > index 01eb635..019496d 100644
> > --- a/arch/powerpc/kvm/booke.c
> > +++ b/arch/powerpc/kvm/booke.c
> > @@ -1570,6 +1570,22 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu
> > *vcpu, struct kvm_one_reg *reg)
> >  	case KVM_REG_PPC_DEBUG_INST:
> >  		val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV);
> >  		break;
> > +#ifdef CONFIG_ALTIVEC
> > +	case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
> > +		if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
> > +			r = -ENXIO;
> > +			break;
> > +		}
> > +		val.vval = vcpu->arch.vr[reg->id - KVM_REG_PPC_VR0];
> > +		break;
> > +	case KVM_REG_PPC_VSCR:
> > +		if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
> > +			r = -ENXIO;
> > +			break;
> > +		}
> > +		val = get_reg_val(reg->id, vcpu->arch.vscr.u[3]);
> > +		break;
> 
> Why u[3]?

AltiVec PEM manual says: "The VSCR has two defined bits, the AltiVec non-Java
mode (NJ) bit (VSCR[15]) and the AltiVec saturation (SAT) bit (VSCR[31]);
the remaining bits are reserved."

I think this is the reason Paul M. exposed KVM_REG_PPC_VSCR width as 32-bit.

-Mike
diff mbox

Patch

diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 01eb635..019496d 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -1570,6 +1570,22 @@  int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
 	case KVM_REG_PPC_DEBUG_INST:
 		val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV);
 		break;
+#ifdef CONFIG_ALTIVEC
+	case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
+		if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+			r = -ENXIO;
+			break;
+		}
+		val.vval = vcpu->arch.vr[reg->id - KVM_REG_PPC_VR0];
+		break;
+	case KVM_REG_PPC_VSCR:
+		if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+			r = -ENXIO;
+			break;
+		}
+		val = get_reg_val(reg->id, vcpu->arch.vscr.u[3]);
+		break;
+#endif /* CONFIG_ALTIVEC */
 	default:
 		r = kvmppc_get_one_reg(vcpu, reg->id, &val);
 		break;
@@ -1643,6 +1659,22 @@  int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
 		kvmppc_set_tcr(vcpu, tcr);
 		break;
 	}
+#ifdef CONFIG_ALTIVEC
+	case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
+		if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+			r = -ENXIO;
+			break;
+		}
+		vcpu->arch.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
+		break;
+	case KVM_REG_PPC_VSCR:
+		if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+			r = -ENXIO;
+			break;
+		}
+		vcpu->arch.vscr.u[3] = set_reg_val(reg->id, val);
+		break;
+#endif /* CONFIG_ALTIVEC */
 	default:
 		r = kvmppc_set_one_reg(vcpu, reg->id, &val);
 		break;