From patchwork Mon Jun 3 16:31:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Bolton X-Patchwork-Id: 248340 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id A04FE2C0099 for ; Tue, 4 Jun 2013 02:32:19 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; q=dns; s= default; b=p8IWib1l7zx/wwwkVb1x0jFDo4uW5iinApTI9s6DCkJjzd4B+UZs5 F+Y/HcG5vvBAO86n5jqchkM1ykXXZn2wWrvMtYIN/dTP1lfx1Lf5dAw7QgpQJ3G8 i6Hx1PFbR00YH7y7FSTcINjyP6Fo9BNjhaGppSZyIdD7Ax+0Q+3JTo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; s= default; bh=PneV+CrjnVn3BRvRNSKqtGUH4F4=; b=qQo+JxS++zT7b5xq0Lmt hmkx96KrWVoCNXveuYP+QHdHikw+Vd9ydasJYTbofhDCklpH32mWV4t0/i3rU87A vDAmtuTVQkFkGc0TDONmLDvXEnvM2KdycuJC5ug6HLco9vXXkoxKTGLK03vRo0/A Xb16ouoPGT6hX0KpO9wJHIA= Received: (qmail 18450 invoked by alias); 3 Jun 2013 16:32:05 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 18413 invoked by uid 89); 3 Jun 2013 16:32:05 -0000 X-Spam-SWARE-Status: No, score=-1.6 required=5.0 tests=AWL, BAYES_00, MSGID_MULTIPLE_AT, RCVD_IN_DNSWL_LOW, SPF_PASS, TW_MV, TW_PM autolearn=no version=3.3.1 Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Mon, 03 Jun 2013 16:32:04 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Mon, 03 Jun 2013 17:32:01 +0100 Received: from E102352xp ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 3 Jun 2013 17:32:00 +0100 From: "Ian Bolton" To: Subject: [AArch64, PATCH 2/5] Improve MOVI handling (Remove wrapper function) Date: Mon, 3 Jun 2013 17:31:53 +0100 Message-ID: <000401ce6077$dd728e10$9857aa30$@bolton@arm.com> MIME-Version: 1.0 X-MC-Unique: 113060317320106501 X-Virus-Found: No (This patch is the second of five, where the first 4 do some clean-up and the last fixes a bug with scalar MOVI. The bug fix without the clean-up was particularly ugly!) This one is also very simple - removing a wrapper function that was an unnecessary level of indirection. OK for trunk? Cheers, Ian 13-06-03 Ian Bolton * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): No longer static. (aarch64_simd_immediate_valid_for_move): Remove. (aarch64_simd_scalar_immediate_valid_for_move): Update call. (aarch64_simd_make_constant): Update call. (aarch64_output_simd_mov_immediate): Update call. * config/aarch64/aarch64-protos.h (aarch64_simd_valid_immediate): Add prototype. * config/aarch64/constraints.md (Dn): Update call. diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index 91fcde8..d1de14e 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -156,6 +156,8 @@ bool aarch64_simd_imm_scalar_p (rtx x, enum machine_mode mode); bool aarch64_simd_imm_zero_p (rtx, enum machine_mode); bool aarch64_simd_scalar_immediate_valid_for_move (rtx, enum machine_mode); bool aarch64_simd_shift_imm_p (rtx, enum machine_mode, bool); +bool aarch64_simd_valid_immediate (rtx, enum machine_mode, int, rtx *, + int *, unsigned char *, int *, int *); bool aarch64_symbolic_address_p (rtx); bool aarch64_symbolic_constant_p (rtx, enum aarch64_symbol_context, enum aarch64_symbol_type *); diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 05ff5fa..aec59b0 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -103,8 +103,6 @@ static bool aarch64_vfp_is_call_or_return_candidate (enum machine_mode, static void aarch64_elf_asm_constructor (rtx, int) ATTRIBUTE_UNUSED; static void aarch64_elf_asm_destructor (rtx, int) ATTRIBUTE_UNUSED; static void aarch64_override_options_after_change (void); -static bool aarch64_simd_valid_immediate (rtx, enum machine_mode, int, rtx *, - int *, unsigned char *, int *, int *); static bool aarch64_vector_mode_supported_p (enum machine_mode); static unsigned bit_count (unsigned HOST_WIDE_INT); static bool aarch64_const_vec_all_same_int_p (rtx, @@ -6145,7 +6143,7 @@ aarch64_vect_float_const_representable_p (rtx x) } /* Return true for valid and false for invalid. */ -static bool +bool aarch64_simd_valid_immediate (rtx op, enum machine_mode mode, int inverse, rtx *modconst, int *elementwidth, unsigned char *elementchar, @@ -6349,45 +6347,6 @@ aarch64_simd_valid_immediate (rtx op, enum machine_mode mode, int inverse, #undef CHECK } -/* Return TRUE if rtx X is legal for use as either a AdvSIMD MOVI instruction - (or, implicitly, MVNI) immediate. Write back width per element - to *ELEMENTWIDTH, and a modified constant (whatever should be output - for a MOVI instruction) in *MODCONST. */ -int -aarch64_simd_immediate_valid_for_move (rtx op, enum machine_mode mode, - rtx *modconst, int *elementwidth, - unsigned char *elementchar, - int *mvn, int *shift) -{ - rtx tmpconst; - int tmpwidth; - unsigned char tmpwidthc; - int tmpmvn = 0, tmpshift = 0; - bool retval = aarch64_simd_valid_immediate (op, mode, 0, &tmpconst, - &tmpwidth, &tmpwidthc, - &tmpmvn, &tmpshift); - - if (!retval) - return 0; - - if (modconst) - *modconst = tmpconst; - - if (elementwidth) - *elementwidth = tmpwidth; - - if (elementchar) - *elementchar = tmpwidthc; - - if (mvn) - *mvn = tmpmvn; - - if (shift) - *shift = tmpshift; - - return 1; -} - static bool aarch64_const_vec_all_same_int_p (rtx x, HOST_WIDE_INT minval, @@ -6492,9 +6451,8 @@ aarch64_simd_scalar_immediate_valid_for_move (rtx op, enum machine_mode mode) gcc_assert (!VECTOR_MODE_P (mode)); vmode = aarch64_preferred_simd_mode (mode); rtx op_v = aarch64_simd_gen_const_vector_dup (vmode, INTVAL (op)); - int retval = aarch64_simd_immediate_valid_for_move (op_v, vmode, 0, - NULL, NULL, NULL, NULL); - return retval; + return aarch64_simd_valid_immediate (op_v, vmode, 0, NULL, + NULL, NULL, NULL, NULL); } /* Construct and return a PARALLEL RTX vector. */ @@ -6722,8 +6680,8 @@ aarch64_simd_make_constant (rtx vals) gcc_unreachable (); if (const_vec != NULL_RTX - && aarch64_simd_immediate_valid_for_move (const_vec, mode, NULL, NULL, - NULL, NULL, NULL)) + && aarch64_simd_valid_immediate (const_vec, mode, 0, NULL, + NULL, NULL, NULL, NULL)) /* Load using MOVI/MVNI. */ return const_vec; else if ((const_dup = aarch64_simd_dup_constant (vals)) != NULL_RTX) @@ -7285,7 +7243,7 @@ aarch64_output_simd_mov_immediate (rtx *const_vector, enum machine_mode mode, unsigned width) { - int is_valid; + bool is_valid; unsigned char widthc; int lane_width_bits; static char templ[40]; @@ -7293,10 +7251,14 @@ aarch64_output_simd_mov_immediate (rtx *const_vector, const char *mnemonic; unsigned int lane_count = 0; +/* This will return true to show const_vector is legal for use as either + a AdvSIMD MOVI instruction (or, implicitly, MVNI) immediate. It + writes back various values via the int pointers and it modifies the + operand pointed to by CONST_VECTOR in-place, if required. */ is_valid = - aarch64_simd_immediate_valid_for_move (*const_vector, mode, - const_vector, &lane_width_bits, - &widthc, &mvn, &shift); + aarch64_simd_valid_immediate (*const_vector, mode, 0, + const_vector, &lane_width_bits, + &widthc, &mvn, &shift); gcc_assert (is_valid); mode = GET_MODE_INNER (mode); diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md index d9c18e6..d195425 100644 --- a/gcc/config/aarch64/constraints.md +++ b/gcc/config/aarch64/constraints.md @@ -143,9 +143,9 @@ "@internal A constraint that matches vector of immediates." (and (match_code "const_vector") - (match_test "aarch64_simd_immediate_valid_for_move (op, GET_MODE (op), - NULL, NULL, NULL, - NULL, NULL) != 0"))) + (match_test "aarch64_simd_valid_immediate (op, GET_MODE (op), 0, + NULL, NULL, NULL, + NULL, NULL)"))) (define_constraint "Dh" "@internal