@@ -283,6 +283,11 @@ int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
u8 cmd, idcode0;
int ret;
+ if (flash->bank_curr == bank_sel) {
+ debug("SF: not require to enable bank%d\n", bank_sel);
+ return 0;
+ }
+
idcode0 = flash->idcode0;
if (idcode0 == 0x01) {
cmd = CMD_BANKADDR_BRWR;
@@ -304,6 +309,7 @@ int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
debug("SF: fail to write bank addr register\n");
return ret;
}
+ flash->bank_curr = bank_sel;
ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
if (ret < 0) {
@@ -432,6 +438,7 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
struct spi_flash *flash = NULL;
int ret, i, shift;
u8 idcode[IDCODE_LEN], *idp;
+ u8 curr_bank = 0;
spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
if (!spi) {
@@ -491,6 +498,16 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
printf(", mapped at %p", flash->memory_map);
puts("\n");
+ if (flash->size > SPI_FLASH_16MB_BOUN) {
+ if (spi_flash_cmd_bankaddr_read(flash, &curr_bank)) {
+ debug("SF: fail to read bank addr register\n");
+ goto err_manufacturer_probe;
+ }
+ flash->bank_curr = curr_bank;
+ } else {
+ flash->bank_curr = curr_bank;
+ }
+
spi_release_bus(spi);
return flash;
@@ -12,6 +12,8 @@
#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
+#define SPI_FLASH_16MB_BOUN 0x1000000
+
/* Common commands */
#define CMD_READ_ID 0x9f
@@ -40,6 +40,8 @@ struct spi_flash {
u32 sector_size;
/* ID code0 */
u8 idcode0;
+ /* Current flash bank */
+ u8 bank_curr;
void *memory_map; /* Address of read-only SPI flash access */
int (*read)(struct spi_flash *flash, u32 offset,
Read the flash bank addr register to get the state of bank in a perticular flash. and also bank write happens only when there is a change in bank selection from user. bank read only valid for flashes which has > 16Mbytes those are opearted in 3-byte addr mode, each bank occupies 16Mytes. Suppose if the flash has 64Mbytes size consists of 4 banks like bank0, bank1, bank2 and bank3. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> --- Changes for v2: - none drivers/mtd/spi/spi_flash.c | 17 +++++++++++++++++ drivers/mtd/spi/spi_flash_internal.h | 2 ++ include/spi_flash.h | 2 ++ 3 files changed, 21 insertions(+)