[ARM] Fix rfe instruction

Submitted by Peter Chubb on May 31, 2013, 4:50 a.m.

Details

Message ID 84hahju505.wl%peter@chubb.wattle.id.au
State New
Headers show

Commit Message

Peter Chubb May 31, 2013, 4:50 a.m.
The rfe instruction has been broken since patch
5a839c0d54fac9db0516904db873a4fe01f50f4b because of a typo.

Signed-off-by: Peter Chubb <peter.chubb@nicta.com.au>


--
Dr Peter Chubb				        peter.chubb AT nicta.com.au
http://www.ssrg.nicta.com.au          Software Systems Research Group/NICTA

Comments

Peter Maydell May 31, 2013, 7:55 a.m.
On 31 May 2013 05:50, Peter Chubb <peter.chubb@nicta.com.au> wrote:
>
> The rfe instruction has been broken since patch
> 5a839c0d54fac9db0516904db873a4fe01f50f4b because of a typo.
>
> Signed-off-by: Peter Chubb <peter.chubb@nicta.com.au>

Oops. I thought I'd caught all those when I reread the
patches before submission but I evidently missed one :-(

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

-- PMM

Patch hide | download patch | download mbox

diff --git a/target-arm/translate.c b/target-arm/translate.c
index e5a2e4c..29e8f27 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6798,7 +6798,7 @@  static void disas_arm_insn(CPUARMState * env, DisasContext *s)
             tcg_gen_qemu_ld32u(tmp, addr, 0);
             tcg_gen_addi_i32(addr, addr, 4);
             tmp2 = tcg_temp_new_i32();
-            tcg_gen_qemu_ld32u(tmp, addr, 0);
+            tcg_gen_qemu_ld32u(tmp2, addr, 0);
             if (insn & (1 << 21)) {
                 /* Base writeback.  */
                 switch (i) {