From patchwork Thu May 30 16:04:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergey Yanovich X-Patchwork-Id: 247639 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-la0-x238.google.com (mail-la0-x238.google.com [IPv6:2a00:1450:4010:c03::238]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 39D6F2C02BD for ; Fri, 31 May 2013 02:04:57 +1000 (EST) Received: by mail-la0-f56.google.com with SMTP id fm20sf114391lab.21 for ; Thu, 30 May 2013 09:04:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=x-beenthere:message-id:subject:from:to:cc:date:in-reply-to :references:x-mailer:mime-version:x-original-sender :x-original-authentication-results:reply-to:precedence:mailing-list :list-id:x-google-group-id:list-post:list-help:list-archive:sender :list-subscribe:list-unsubscribe:content-type; bh=/JSU7rufp4s9eqfhNyb2K98FBkm6Ql/v6Z0JbeToITk=; b=NORsnusV3eJ39yri3YqJmxQ5YlfmLLW8PgaqzaUmsIQxg6n9/dRv0wSHHpLg6gm3MI mGYk3O4oq0zfjKDrb/MVHX6VFBT3PJ4tRBNyDLl1fBzT6O0MUSFPy1/A09cWo3CsgNlP mN3w/4lIwSWQSKOg/xqseh3GTAVZx7dOtzGLvdBLE6ES1MdLnL7VUAUnOnBekMKYmzG8 fUc8tTPbLUoARwEGOCa7sGdIVvh4EwDG6V8QdWO9kH77yZFsRCUsS0rdtJ45pZ57KU9k B8bOCmQBthggL3OCrgPsKJN0O8ioh8w5S+lWs/e+pp/114Woc6rXaz5hERZzglf9oLad AwiQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-beenthere:message-id:subject:from:to:cc:date:in-reply-to :references:x-mailer:mime-version:x-original-sender :x-original-authentication-results:reply-to:precedence:mailing-list :list-id:x-google-group-id:list-post:list-help:list-archive:sender :list-subscribe:list-unsubscribe:content-type; bh=/JSU7rufp4s9eqfhNyb2K98FBkm6Ql/v6Z0JbeToITk=; b=dX1ky4HqPdcJ7JCoi1Qv1nRPcWhW6BLtmcf3FM6qlr2ub2wQ81uvk1WrGK5LpWxiUp 3TpbUYxBuR66IC1vY1LAP4ZF2AjwFOnxYelxRougvV69oJGs1aNPwnMAEKBHkBlju+8b cTr3NLW7o81BKMnqr6hFOQlGfN8Kel/03zyGZjNS5uxSbrcpMs07y31uLobe1WCfSKyb WxB1AFExJP9cLGcd9Hj8snrGdzQjmHZnPLCu/nJw7qcF/jqCyS8qewdDk9DXCny8Rsrg InG1/0I/b4SelKsg7nv4WJ0OyuIg8EO+Ae6pjQwJRxSgPxeiDRtRTQ19Jp4kRshx/3w4 71+Q== X-Received: by 10.180.73.180 with SMTP id m20mr2153012wiv.12.1369929892190; Thu, 30 May 2013 09:04:52 -0700 (PDT) X-BeenThere: rtc-linux@googlegroups.com Received: by 10.180.80.168 with SMTP id s8ls346443wix.29.gmail; Thu, 30 May 2013 09:04:51 -0700 (PDT) X-Received: by 10.204.228.132 with SMTP id je4mr906607bkb.6.1369929891630; Thu, 30 May 2013 09:04:51 -0700 (PDT) Received: from mail-la0-x229.google.com (mail-la0-x229.google.com [2a00:1450:4010:c03::229]) by gmr-mx.google.com with ESMTPS id i9si3475987bki.2.2013.05.30.09.04.51 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 30 May 2013 09:04:51 -0700 (PDT) Received-SPF: pass (google.com: domain of ynvich@gmail.com designates 2a00:1450:4010:c03::229 as permitted sender) client-ip=2a00:1450:4010:c03::229; Received: by mail-la0-f41.google.com with SMTP id ee20so438677lab.14 for ; Thu, 30 May 2013 09:04:51 -0700 (PDT) X-Received: by 10.112.150.42 with SMTP id uf10mr4048908lbb.89.1369929891275; Thu, 30 May 2013 09:04:51 -0700 (PDT) Received: from [192.168.1.38] (0893675324.static.corbina.ru. [95.31.1.192]) by mx.google.com with ESMTPSA id y7sm17891400lad.5.2013.05.30.09.04.49 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 30 May 2013 09:04:50 -0700 (PDT) Message-ID: <1369929888.16480.5.camel@host5.omatika.ru> Subject: [rtc-linux] [PATCH] rtc-ds1302: handle write protection From: Sergey Yanovich To: Marc Zyngier Cc: Andrew Morton , rtc-linux@googlegroups.com, linux-kernel@vger.kernel.org, Alessandro Zummo , Sachin Kamat , Jingoo Han Date: Thu, 30 May 2013 20:04:48 +0400 In-Reply-To: <53f44a9ec4c8391288d6c132fd5689da@localhost> References: <1369092090-5384-1-git-send-email-ynvich@gmail.com> <20130529155311.9e35e847968f3923bc83f4cd@linux-foundation.org> <1369908882.17429.13.camel@host5.omatika.ru> <53f44a9ec4c8391288d6c132fd5689da@localhost> X-Mailer: Evolution 3.4.4-3 Mime-Version: 1.0 X-Original-Sender: ynvich@gmail.com X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: domain of ynvich@gmail.com designates 2a00:1450:4010:c03::229 as permitted sender) smtp.mail=ynvich@gmail.com; dkim=pass header.i=@gmail.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , From f1cd048a066b249082752a96abce7d33a0cd4ea3 Mon Sep 17 00:00:00 2001 From: Sergey Yanovich Date: Tue, 21 May 2013 03:06:31 +0400 Subject: [PATCH] rtc-ds1302: handle write protection This chip has a control register and can prevent altering saved clock. Without this patch we could have: ----8<---- (arm)root@pac14:~# date Tue May 21 03:08:27 MSK 2013 (arm)root@pac14:~# /etc/init.d/hwclock.sh show Tue May 21 11:13:58 2013 -0.067322 seconds (arm)root@pac14:~# /etc/init.d/hwclock.sh stop [info] Saving the system clock. [info] Hardware Clock updated to Tue May 21 03:09:01 MSK 2013. (arm)root@pac14:~# /etc/init.d/hwclock.sh show Tue May 21 11:14:15 2013 -0.624272 seconds ----8<---- The patch enables write access to rtc before the driver tries to write time and re-disables when time data is written. Signed-off-by: Sergey Yanovich # Changes to be committed: Acked-by: Marc Zyngier --- changes for v2: - do enable/disable around set_time() instead of in probe()/remove() drivers/rtc/rtc-ds1302.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/rtc/rtc-ds1302.c b/drivers/rtc/rtc-ds1302.c index 7533b72..07e8d79 100644 --- a/drivers/rtc/rtc-ds1302.c +++ b/drivers/rtc/rtc-ds1302.c @@ -23,8 +23,12 @@ #define RTC_CMD_READ 0x81 /* Read command */ #define RTC_CMD_WRITE 0x80 /* Write command */ +#define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */ +#define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */ + #define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */ #define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */ +#define RTC_ADDR_CTRL 0x07 /* Address of control register */ #define RTC_ADDR_YEAR 0x06 /* Address of year register */ #define RTC_ADDR_DAY 0x05 /* Address of day of week register */ #define RTC_ADDR_MON 0x04 /* Address of month register */ @@ -161,6 +165,7 @@ static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm) static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm) { + ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_ENABLE); /* Stop RTC */ ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); @@ -175,6 +180,8 @@ static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm) /* Start RTC */ ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80); + ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_DISABLE); + return 0; }