Patchwork [U-Boot,v4,03/10] GPIO: add gpio driver for Dove SoCs

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Submitter Sascha Silbe
Date May 26, 2013, 6:36 p.m.
Message ID <1369593423-19763-4-git-send-email-t-uboot@infra-silbe.de>
Download mbox | patch
Permalink /patch/246467/
State Superseded
Delegated to: Prafulla Wadaskar
Headers show

Comments

Sascha Silbe - May 26, 2013, 6:36 p.m.
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

This adds a gpio driver for Marvell Dove SoCs. It is based on kw_gpio;
but as gpio capabilities depend heavily on the mpp configuration for
dove, it allows to set gpi/gpo capabilities from mpp.

While it's currently targeted at Dove SoCs only, the driver should in
large parts be compatible with orion5x and kirkwood. As a future
clean-up step, the MPP and GPIO code for the three platforms could be
merged.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
---
 v3->v4: renamed to dove_gpio, adjusted description

 drivers/gpio/Makefile    |   1 +
 drivers/gpio/dove_gpio.c | 167 +++++++++++++++++++++++++++++++++++++++++++++++
 include/dove_gpio.h      |  64 ++++++++++++++++++
 3 files changed, 232 insertions(+)
 create mode 100644 drivers/gpio/dove_gpio.c
 create mode 100644 include/dove_gpio.h

Patch

diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 830e8e6..6d44bfd 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -26,6 +26,7 @@  include $(TOPDIR)/config.mk
 LIB 	:= $(obj)libgpio.o
 
 COBJS-$(CONFIG_AT91_GPIO)	+= at91_gpio.o
+COBJS-$(CONFIG_DOVE_GPIO)	+= dove_gpio.o
 COBJS-$(CONFIG_INTEL_ICH6_GPIO)	+= intel_ich6_gpio.o
 COBJS-$(CONFIG_KIRKWOOD_GPIO)	+= kw_gpio.o
 COBJS-$(CONFIG_MARVELL_GPIO)	+= mvgpio.o
diff --git a/drivers/gpio/dove_gpio.c b/drivers/gpio/dove_gpio.c
new file mode 100644
index 0000000..d16e641
--- /dev/null
+++ b/drivers/gpio/dove_gpio.c
@@ -0,0 +1,167 @@ 
+/*
+ * Marvell Dove SoC GPIO handling.
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver.
+ * Removed orion_gpiochip struct and kernel level irq handling.
+ * Dieter Kiermaier dk-arm-linux@gmx.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <asm/bitops.h>
+#include <asm/io.h>
+#include <asm/arch/gpio.h>
+#include <dove_gpio.h>
+
+static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)];
+static unsigned long gpio_valid_output[BITS_TO_LONGS(GPIO_MAX)];
+
+void __set_direction(unsigned pin, int input)
+{
+	u32 base = GPIO_BASE(pin);
+	u32 u;
+
+	u = readl(GPIO_IO_CONF(base));
+	if (input)
+		u |= 1 << (pin & 31);
+	else
+		u &= ~(1 << (pin & 31));
+	writel(u, GPIO_IO_CONF(base));
+
+	u = readl(GPIO_IO_CONF(base));
+}
+
+void __set_level(unsigned pin, int high)
+{
+	u32 base = GPIO_BASE(pin);
+	u32 u;
+
+	u = readl(GPIO_OUT(base));
+	if (high)
+		u |= 1 << (pin & 31);
+	else
+		u &= ~(1 << (pin & 31));
+	writel(u, GPIO_OUT(base));
+}
+
+void __set_blinking(unsigned pin, int blink)
+{
+	u32 base = GPIO_BASE(pin);
+	u32 u;
+
+	u = readl(GPIO_BLINK_EN(base));
+	if (blink)
+		u |= 1 << (pin & 31);
+	else
+		u &= ~(1 << (pin & 31));
+	writel(u, GPIO_BLINK_EN(base));
+}
+
+int dove_gpio_is_valid(unsigned pin, int mode)
+{
+	if (pin < GPIO_MAX) {
+		if ((mode & GPIO_INPUT_OK) &&
+		    !test_bit(pin, gpio_valid_input))
+			goto err_out;
+
+		if ((mode & GPIO_OUTPUT_OK) &&
+		    !test_bit(pin, gpio_valid_output))
+			goto err_out;
+		return 0;
+	}
+
+err_out:
+	printf("%s: invalid GPIO %d/%d\n", __func__, pin, GPIO_MAX);
+	return 1;
+}
+
+void dove_gpio_set_valid(unsigned pin, int mode)
+{
+	if (mode & GPIO_INPUT_OK)
+		__set_bit(pin, gpio_valid_input);
+	else
+		__clear_bit(pin, gpio_valid_input);
+	if (mode & GPIO_OUTPUT_OK)
+		__set_bit(pin, gpio_valid_output);
+	else
+		__clear_bit(pin, gpio_valid_output);
+}
+
+/*
+ * GENERIC_GPIO primitives.
+ */
+int dove_gpio_direction_input(unsigned pin)
+{
+	if (dove_gpio_is_valid(pin, GPIO_INPUT_OK) != 0)
+		return 1;
+
+	/* Configure GPIO direction. */
+	__set_direction(pin, 1);
+
+	return 0;
+}
+
+int dove_gpio_direction_output(unsigned pin, int value)
+{
+	if (dove_gpio_is_valid(pin, GPIO_OUTPUT_OK) != 0) {
+		printf("%s: invalid GPIO %d\n", __func__, pin);
+		return 1;
+	}
+
+	__set_blinking(pin, 0);
+
+	/* Configure GPIO output value. */
+	__set_level(pin, value);
+
+	/* Configure GPIO direction. */
+	__set_direction(pin, 0);
+
+	return 0;
+}
+
+int dove_gpio_get_value(unsigned pin)
+{
+	u32 base = GPIO_BASE(pin);
+	int val;
+
+	if (readl(GPIO_IO_CONF(base)) & (1 << (pin & 31)))
+		val = readl(GPIO_DATA_IN(base)) ^ readl(GPIO_IN_POL(base));
+	else
+		val = readl(GPIO_OUT(base));
+
+	return (val >> (pin & 31)) & 1;
+}
+
+void dove_gpio_set_value(unsigned pin, int value)
+{
+	/* Configure GPIO output value. */
+	__set_level(pin, value);
+}
+
+void dove_gpio_set_blink(unsigned pin, int blink)
+{
+	/* Set output value to zero. */
+	__set_level(pin, 0);
+
+	/* Set blinking. */
+	__set_blinking(pin, blink);
+}
diff --git a/include/dove_gpio.h b/include/dove_gpio.h
new file mode 100644
index 0000000..ab356bc
--- /dev/null
+++ b/include/dove_gpio.h
@@ -0,0 +1,64 @@ 
+/*
+ * Marvell Dove SoCs common gpio
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __DOVE_GPIO_H
+#define __DOVE_GPIO_H
+
+/*
+ * SoC-specific gpio.h defines
+ * GPIO_MAX and GPIO_BASE(pin) macro
+ */
+
+#define GPIO_INPUT_OK		(1 << 0)
+#define GPIO_OUTPUT_OK		(1 << 1)
+#define GPIO_LOW		0
+#define GPIO_HIGH		1
+
+/* got from kernel include/linux/bitops.h */
+#define BITS_PER_BYTE 8
+#define BITS_TO_LONGS(nr)	DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
+
+#define GPIO_OUT(base)		((base) + 0x00)
+#define GPIO_IO_CONF(base)	((base) + 0x04)
+#define GPIO_BLINK_EN(base)	((base) + 0x08)
+#define GPIO_IN_POL(base)	((base) + 0x0c)
+#define GPIO_DATA_IN(base)	((base) + 0x10)
+#define GPIO_EDGE_CAUSE(base)	((base) + 0x14)
+#define GPIO_EDGE_MASK(base)	((base) + 0x18)
+#define GPIO_LEVEL_MASK(base)	((base) + 0x1c)
+
+/*
+ * Dove-specific GPIO API
+ */
+
+void dove_gpio_set_valid(unsigned pin, int mode);
+int dove_gpio_is_valid(unsigned pin, int mode);
+int dove_gpio_direction_input(unsigned pin);
+int dove_gpio_direction_output(unsigned pin, int value);
+int dove_gpio_get_value(unsigned pin);
+void dove_gpio_set_value(unsigned pin, int value);
+void dove_gpio_set_blink(unsigned pin, int blink);
+void dove_gpio_set_unused(unsigned pin);
+
+#endif