@@ -693,6 +693,10 @@ Lauri Hintsala <lauri.hintsala@bluegiga.com>
apx4devkit i.MX28
+Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+
+ cubox ARM ARMV7 (Dove SoC)
+
Vaibhav Hiremath <hvaibhav@ti.com>
am3517_evm ARM ARMV7 (AM35x SoC)
new file mode 100644
@@ -0,0 +1,45 @@
+#
+# SolidRun CuBox Makefile
+#
+# Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS := cubox.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
new file mode 100644
@@ -0,0 +1,142 @@
+/*
+ * SolidRun CuBox board support
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <miiphy.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/dove.h>
+#include <asm/arch/mpp.h>
+#include <asm/arch/mmc.h>
+#include <dove_gpio.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static u16 mpp_config[] = {
+ MPP0_GPIO,
+ MPP1_GPIO, /* USB power enable */
+ MPP2_GPIO, /* USB over-current indication */
+ MPP3_GPIO, /* micro button beneath eSATA port */
+ MPP4_GPIO,
+ MPP5_GPIO,
+ MPP6_GPIO,
+ MPP7_GPIO,
+
+ MPP8_GPIO,
+ MPP9_GPIO,
+ MPP10_GPIO,
+ MPP11_GPIO,
+ MPP12_GPIO, /* SDIO0 card detect */
+ MPP13_AUDIO1_EXTCLK, /* Si5351a audio clock output */
+ MPP14_GPIO,
+ MPP15_GPIO,
+
+ MPP16_GPIO,
+ MPP17_GPIO,
+ MPP18_GPIO, /* Red front LED */
+ MPP19_UART3_RXD, /* IR sensor */
+ MPP20_GPIO,
+ MPP21_GPIO,
+ MPP22_GPIO,
+ MPP23_GPIO,
+
+ MPP_CAMERA_GPIO,
+ MPP_SDIO0_SDIO, /* SDIO0 */
+ MPP_SDIO1_GPIO,
+ MPP_AUDIO1_I2S_SPDIFO, /* SPDIF and HDMI audio */
+ MPP_SPI_SPI, /* SPI */
+ MPP_UART1_GPIO,
+ MPP_NAND_GPO,
+
+ MPP_AUDIO0_I2S,
+ MPP_TWSI_OPTION1, /* TWSI on dedicated pins */
+ 0 };
+
+int board_early_init_f(void)
+{
+ struct dove_gpio_init gpp = {
+ .val0 = 0x00010186,
+ .oe0_n = 0xffffffff,
+ .val1 = 0x018000c0,
+ .oe1_n = 0xffffffff,
+ .val2 = 0x00000000,
+ .oe2_n = 0xffffffff,
+ };
+
+ dove_init_gpio(&gpp);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = dove_dram_start(0) + 0x100;
+
+ /* configure mpp */
+ dove_mpp_conf(mpp_config);
+
+ /* usb power enable */
+ dove_gpio_direction_output(MPP1, GPIO_HIGH);
+
+ /* blink led */
+ dove_gpio_direction_output(MPP18, GPIO_HIGH);
+ dove_gpio_set_blink(MPP18, 1);
+
+ return 0;
+}
+
+#ifdef CONFIG_MMC
+int board_mmc_init(bd_t *bis)
+{
+ dove_sdhci_init(0);
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_RESET_PHY_R
+void dove_eth_phy_init(char *name)
+{
+ u16 devadr;
+
+ if (miiphy_set_current_dev(name))
+ return;
+
+ /* command to read PHY dev address */
+ if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) {
+ printf("Err..%s could not read PHY dev address\n",
+ __func__);
+ return;
+ }
+
+ /* reset the phy */
+ miiphy_reset(name, devadr);
+
+ printf("%s PHY initialized\n", name);
+}
+
+void reset_phy(void)
+{
+ dove_eth_phy_init("egiga0");
+}
+#endif /* CONFIG_RESET_PHY_R */
new file mode 100644
@@ -0,0 +1,76 @@
+#
+# Marvell BootROM config for SolidRun CuBox
+#
+# Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM spi
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+
+# SDRAM initalization
+DATA 0xd0800020 0x00022430 # SDRAM Configuration register 0
+DATA 0xd0800030 0x00022430 # SDRAM Configuration register 1
+DATA 0xd0800050 0x911500c3 # SDRAM Timing register 1
+DATA 0xd0800060 0x646602c4 # SDRAM Timing register 2
+DATA 0xd0800190 0xc2003053 # SDRAM Timing register 3
+DATA 0xd08001c0 0x34f4a187 # SDRAM Timing register 4
+DATA 0xd0800650 0x000f0121 # SDRAM Timing register 5
+DATA 0xd0800660 0x04040200 # SDRAM Timing register 6
+DATA 0xd0800080 0x00000000 # SDRAM Control register 1
+DATA 0xd0800090 0x00080000 # SDRAM Control register 2
+DATA 0xd08000f0 0xc0000000 # SDRAM Control register 3
+DATA 0xd08001a0 0x20c0c009 # SDRAM Control register 4
+DATA 0xd0800280 0x010e0202 # SDRAM Control register 5
+DATA 0xd0800760 0x00000000 # SDRAM Control register 6
+DATA 0xd0800770 0x0000000a # SDRAM Control register 7
+DATA 0xd0800140 0x20004044 # SDRAM PHY control register 3
+DATA 0xd08001d0 0x133c2339 # SDRAM PHY control register 7
+DATA 0xd08001e0 0x07700330 # SDRAM PHY control register 8
+DATA 0xd08001f0 0x00000033 # SDRAM PHY control register 9
+DATA 0xd0800200 0x0011311c # SDRAM PHY control register 10
+DATA 0xd0800210 0x00300000 # SDRAM PHY control register 11
+DATA 0xd0800240 0x80000000 # SDRAM PHY control register 14
+DATA 0xd0800510 0x010e0101 # SDRAM MCB control register 1
+DATA 0xd0800230 0x2028006a # SDRAM PHY control register 13
+DATA 0xd0800e10 0x00280062 # SDRAM PHY DLL control registers 2
+DATA 0xd0800e20 0x00280062 # SDRAM PHY DLL control registers 3
+DATA 0xd0800e30 0x00280062 # SDRAM PHY DLL control registers 4
+
+# SDRAM memory map (2x512MB)
+DATA 0xd0800100 0x000d0001 # SDRAM Memory Address Map register 1
+DATA 0xd0800110 0x200d0001 # SDRAM Memory Address Map register 1
+
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+
+# End of Header extension
+DATA 0x0 0x0
new file mode 100644
@@ -0,0 +1,76 @@
+#
+# Marvell BootROM config for SolidRun CuBox
+#
+# Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM spi
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+
+# SDRAM initalization
+DATA 0xd0800020 0x00022530 # SDRAM Configuration register 0
+DATA 0xd0800030 0x00022530 # SDRAM Configuration register 1
+DATA 0xd0800050 0x911500c3 # SDRAM Timing register 1
+DATA 0xd0800060 0x64660784 # SDRAM Timing register 2
+DATA 0xd0800190 0xc2003053 # SDRAM Timing register 3
+DATA 0xd08001c0 0x34f4a187 # SDRAM Timing register 4
+DATA 0xd0800650 0x000f0121 # SDRAM Timing register 5
+DATA 0xd0800660 0x04040200 # SDRAM Timing register 6
+DATA 0xd0800080 0x00000000 # SDRAM Control register 1
+DATA 0xd0800090 0x00080000 # SDRAM Control register 2
+DATA 0xd08000f0 0xc0000000 # SDRAM Control register 3
+DATA 0xd08001a0 0x20c0c009 # SDRAM Control register 4
+DATA 0xd0800280 0x010e0202 # SDRAM Control register 5
+DATA 0xd0800760 0x00000000 # SDRAM Control register 6
+DATA 0xd0800770 0x0000000a # SDRAM Control register 7
+DATA 0xd0800140 0x20004044 # SDRAM PHY control register 3
+DATA 0xd08001d0 0x133c2339 # SDRAM PHY control register 7
+DATA 0xd08001e0 0x07700330 # SDRAM PHY control register 8
+DATA 0xd08001f0 0x00000033 # SDRAM PHY control register 9
+DATA 0xd0800200 0x0011311c # SDRAM PHY control register 10
+DATA 0xd0800210 0x00300000 # SDRAM PHY control register 11
+DATA 0xd0800240 0x80000000 # SDRAM PHY control register 14
+DATA 0xd0800510 0x010e0101 # SDRAM MCB control register 1
+DATA 0xd0800230 0x2028006a # SDRAM PHY control register 13
+DATA 0xd0800e10 0x00280062 # SDRAM PHY DLL control registers 2
+DATA 0xd0800e20 0x00280062 # SDRAM PHY DLL control registers 3
+DATA 0xd0800e30 0x00280062 # SDRAM PHY DLL control registers 4
+
+# SDRAM memory map (2x1GiB)
+DATA 0xd0800100 0x000e0001 # SDRAM Memory Address Map register 1
+DATA 0xd0800110 0x400e0001 # SDRAM Memory Address Map register 1
+
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+
+# End of Header extension
+DATA 0x0 0x0
new file mode 100644
@@ -0,0 +1,76 @@
+#
+# Marvell BootROM config for SolidRun CuBox
+#
+# Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more deta+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM uart
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+
+# SDRAM initalization
+DATA 0xd0800020 0x00022430 # SDRAM Configuration register 0
+DATA 0xd0800030 0x00022430 # SDRAM Configuration register 1
+DATA 0xd0800050 0x911500c3 # SDRAM Timing register 1
+DATA 0xd0800060 0x64660784 # SDRAM Timing register 2
+DATA 0xd0800190 0xc2003053 # SDRAM Timing register 3
+DATA 0xd08001c0 0x34f4a187 # SDRAM Timing register 4
+DATA 0xd0800650 0x000f0121 # SDRAM Timing register 5
+DATA 0xd0800660 0x04040200 # SDRAM Timing register 6
+DATA 0xd0800080 0x00000000 # SDRAM Control register 1
+DATA 0xd0800090 0x00080000 # SDRAM Control register 2
+DATA 0xd08000f0 0xc0000000 # SDRAM Control register 3
+DATA 0xd08001a0 0x20c0c009 # SDRAM Control register 4
+DATA 0xd0800280 0x010e0202 # SDRAM Control register 5
+DATA 0xd0800760 0x00000000 # SDRAM Control register 6
+DATA 0xd0800770 0x0000000a # SDRAM Control register 7
+DATA 0xd0800140 0x20004044 # SDRAM PHY control register 3
+DATA 0xd08001d0 0x133c2339 # SDRAM PHY control register 7
+DATA 0xd08001e0 0x07700330 # SDRAM PHY control register 8
+DATA 0xd08001f0 0x00000033 # SDRAM PHY control register 9
+DATA 0xd0800200 0x0011311c # SDRAM PHY control register 10
+DATA 0xd0800210 0x00300000 # SDRAM PHY control register 11
+DATA 0xd0800240 0x80000000 # SDRAM PHY control register 14
+DATA 0xd0800510 0x010e0101 # SDRAM MCB control register 1
+DATA 0xd0800230 0x2028006a # SDRAM PHY control register 13
+DATA 0xd0800e10 0x00280062 # SDRAM PHY DLL control registers 2
+DATA 0xd0800e20 0x00280062 # SDRAM PHY DLL control registers 3
+DATA 0xd0800e30 0x00280062 # SDRAM PHY DLL control registers 4
+
+# SDRAM memory map (2x512MB)
+DATA 0xd0800100 0x000d0001 # SDRAM Memory Address Map register 1
+DATA 0xd0800110 0x200d0001 # SDRAM Memory Address Map register 1
+
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+DATA 0xd0020104 0x00000000 # CPU Control and Status register
+
+# End of Header extension
+DATA 0x0 0x0
@@ -316,6 +316,9 @@ dalmore arm armv7:arm720t dalmore nvidia
colibri_t20_iris arm armv7:arm720t colibri_t20_iris toradex tegra20
u8500_href arm armv7 u8500 st-ericsson u8500
snowball arm armv7 snowball st-ericsson u8500
+cubox arm armv7 cubox solidrun dove cubox:CUBOX_1GB
+cubox_pro arm armv7 cubox solidrun dove cubox:CUBOX_2GB
+cubox_uart arm armv7 cubox solidrun dove cubox:CUBOX_UART_BOOT
kzm9g arm armv7 kzm9g kmc rmobile
armadillo-800eva arm armv7 armadillo-800eva atmark-techno rmobile
zynq arm armv7 zynq xilinx zynq
new file mode 100644
@@ -0,0 +1,185 @@
+/*
+ * SolidRun CuBox config
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_CUBOX_H
+#define _CONFIG_CUBOX_H
+#include <asm/sizes.h>
+
+/*
+ * Version number information
+ */
+#define CONFIG_IDENT_STRING "SolidRun CuBox"
+
+#undef CONFIG_SYS_KWD_CONFIG
+#if defined(CONFIG_CUBOX_UART_BOOT)
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-uart.cfg
+#elif defined(CONFIG_CUBOX_1GB)
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-spi-1gb.cfg
+#elif defined(CONFIG_CUBOX_2GB)
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-spi-2gb.cfg
+#endif
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_MACH_SOLIDRUN_CUBOX /* Machine type */
+#define CONFIG_SHOW_BOOT_PROGRESS
+#define CONFIG_DOVE_GPIO
+
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
+/*
+ * Enable u-boot API for standalone programs.
+ */
+#define CONFIG_API
+
+/*
+ * Enable device tree support
+ */
+#define CONFIG_OF_LIBFDT
+
+/*
+ * Commands configuration
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_MMC
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+
+/*
+ * redefine mv-common.h macros for armv7/cubox
+ */
+#undef CONFIG_SYS_PROMPT /* previously defined in mv-common.h */
+#define CONFIG_SYS_PROMPT "CuBox> " /* Command Prompt */
+
+/* There is no arch_misc_init on armv7 */
+#undef CONFIG_ARCH_MISC_INIT
+
+#undef CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) /* 4MiB for malloc() */
+
+/*
+ * Environment variables configurations
+ */
+#if defined(CONFIG_CMD_SF)
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_ENV_IS_IN_SPI_FLASH 1
+#define CONFIG_ENV_SECT_SIZE 0x1000 /* 4k */
+#define CONFIG_ENV_SIZE 0x20000 /* 128k */
+#define CONFIG_ENV_OFFSET 0xc0000 /* env starts here */
+#else
+#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */
+#endif
+
+/*
+ * Default CuBox bootscript environment
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "bootscript=boot.scr\0" \
+ "loadaddr=0x02000000\0" \
+ "mmc_started=0\0" \
+ "ide_started=0\0" \
+ "usb_started=0\0" \
+ "mtdparts=mtdparts=spi0.0:768k(u-boot)ro,128k(uboot_env),128k(fdt),-(empty)\0"
+
+#define CONFIG_BOOTCOMMAND \
+ "for devn in usb mmc ide ; do " \
+ " for part in 0 1; do " \
+ " for dir in / /boot/;do " \
+ " for fs in ext2 fat; do " \
+ " echo ===> Executing ${fs}load ${devn} 0:${part} ${loadaddr} ${dir}${bootscript};" \
+ " if itest.s $devn -eq mmc; then" \
+ " if itest.s $mmc_started -ne 1; then" \
+ " mmcinfo; setenv mmc_started '1';fi;fi;" \
+ " if itest.s $devn -eq usb; then" \
+ " if itest.s $usb_started -ne 1; then" \
+ " usb start; setenv usb_started '1';fi;fi;" \
+ " if itest.s $devn -eq ide; then" \
+ " if itest.s $ide_started -ne 1; then" \
+ " ide reset; setenv ide_started '1';fi;fi;" \
+ " if ${fs}load ${devn} 0:${part} ${loadaddr} ${dir}${bootscript}; then" \
+ " source ${loadaddr}; fi;" \
+ " if itest.s $devn -eq usb; then" \
+ " echo ===> Executing ${fs}load ${devn} 1:${part} ${loadaddr} ${dir}${bootscript};" \
+ " if ${fs}load ${devn} 1:${part} ${loadaddr} ${dir}${bootscript}; then" \
+ " source ${loadaddr}; fi;" \
+ " fi;" \
+ " done;" \
+ " done;" \
+ " done;" \
+ "done;" \
+ "tftp ${loadaddr} ${bootscript};" \
+ "source ${loadaddr};"
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_MVGBE_PORTS {1} /* enable port 0 */
+#define CONFIG_PHY_BASE_ADR 1
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MARVELL
+#endif /* CONFIG_CMD_NET */
+
+#ifdef CONFIG_CMD_IDE
+#undef CONFIG_IDE_LED
+#undef CONFIG_SYS_IDE_MAXBUS
+#define CONFIG_SYS_IDE_MAXBUS 1
+#undef CONFIG_SYS_IDE_MAXDEVICE
+#define CONFIG_SYS_IDE_MAXDEVICE 1
+#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
+#endif
+
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+
+/*
+ * File system
+ */
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_FAT
+#define CONFIG_RBTREE
+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_LZO
+
+#endif /* _CONFIG_CUBOX_H */