Patchwork [i386] FP Reassociation for AMD bdver1 and bdver2

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Submitter Gopalasubramanian, Ganesh
Date May 23, 2013, 11:11 a.m.
Message ID <EB4625145972F94C9680D8CADD651615446DB650@sausexdag06.amd.com>
Download mbox | patch
Permalink /patch/245919/
State New
Headers show

Comments

Gopalasubramanian, Ganesh - May 23, 2013, 11:11 a.m.
Hi 

The patch enables FP Reassociation pass AMD bdver1 and bdver2 architectures.
We note a performance uplift of around ~8% on calculix.

"make -k check" passes.

Is it OK for upstream?

Regards
Ganesh
Uros Bizjak - May 23, 2013, 11:17 a.m.
On Thu, May 23, 2013 at 1:11 PM, Gopalasubramanian, Ganesh
<Ganesh.Gopalasubramanian@amd.com> wrote:

> The patch enables FP Reassociation pass AMD bdver1 and bdver2 architectures.
> We note a performance uplift of around ~8% on calculix.
>
> "make -k check" passes.
>
> Is it OK for upstream?

OK.

Thanks,
Uros.
Gopalasubramanian, Ganesh - May 29, 2013, 11:20 a.m.
Thanks Uros! Committed at r199405.

-Ganesh

-----Original Message-----
From: Uros Bizjak [mailto:ubizjak@gmail.com] 
Sent: Thursday, May 23, 2013 4:47 PM
To: Gopalasubramanian, Ganesh
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH,i386] FP Reassociation for AMD bdver1 and bdver2

On Thu, May 23, 2013 at 1:11 PM, Gopalasubramanian, Ganesh <Ganesh.Gopalasubramanian@amd.com> wrote:

> The patch enables FP Reassociation pass AMD bdver1 and bdver2 architectures.
> We note a performance uplift of around ~8% on calculix.
>
> "make -k check" passes.
>
> Is it OK for upstream?

OK.

Thanks,
Uros.

Patch

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog       (revision 199133)
+++ gcc/ChangeLog       (working copy)
@@ -1,3 +1,8 @@ 
+2013-05-23  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
+
+        * config/i386/i386.c (initial_ix86_tune_features): Enable
+        FP Reassociation for AMD bdver1 and bdver2.
+
 2013-05-21  Christian Bruel  <christian.bruel@st.com>

         * dwarf2out.c (multiple_reg_loc_descriptor): Use dbx_reg_number for
Index: gcc/config/i386/i386.c
===================================================================
--- gcc/config/i386/i386.c      (revision 199133)
+++ gcc/config/i386/i386.c      (working copy)
@@ -2026,7 +2026,7 @@ 

   /* X86_TUNE_REASSOC_FP_TO_PARALLEL: Try to produce parallel computations
      during reassociation of fp computation.  */
-  m_ATOM | m_HASWELL,
+  m_ATOM | m_HASWELL | m_BDVER1 | m_BDVER2,

   /* X86_TUNE_GENERAL_REGS_SSE_SPILL: Try to spill general regs to SSE
      regs instead of memory.  */



-----Original Message-----
From: Gopalasubramanian, Ganesh 
Sent: Monday, May 13, 2013 5:24 PM
To: gcc-patches@gcc.gnu.org
Cc: Uros Bizjak (ubizjak@gmail.com)
Subject: [PATCH,i386] FSGSBASE for AMD bdver3 

Hi 

The patch enables FSGSBASE instruction generation for AMD bdver3 architectures.

"make -k check" passes.

Is it OK for upstream?

Regards
Ganesh

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog       (revision 198821)
+++ gcc/ChangeLog       (working copy)
@@ -1,3 +1,8 @@ 
+2013-05-13  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
+
+        * config/i386/i386.c (processor_alias_table): Add instruction
+        FSGSBASE for AMD bdver3 architecture.
+
 2013-05-13  Martin Jambor  <mjambor@suse.cz>

        PR middle-end/42371
Index: gcc/config/i386/i386.c
===================================================================
--- gcc/config/i386/i386.c      (revision 198821)
+++ gcc/config/i386/i386.c      (working copy)
@@ -3000,7 +3000,7 @@ 
        | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX
        | PTA_XOP | PTA_LWP | PTA_BMI | PTA_TBM | PTA_F16C
        | PTA_FMA | PTA_PRFCHW | PTA_FXSR | PTA_XSAVE
-       | PTA_XSAVEOPT},
+       | PTA_XSAVEOPT | PTA_FSGSBASE},
       {"btver1", PROCESSOR_BTVER1, CPU_GENERIC64,
        PTA_64BIT | PTA_MMX |  PTA_SSE  | PTA_SSE2 | PTA_SSE3
        | PTA_SSSE3 | PTA_SSE4A |PTA_ABM | PTA_CX16 | PTA_PRFCHW