@@ -13,4 +13,7 @@
#define MALTA_UART_BASE (MALTA_IO_PORT_BASE + 0x3f8)
+#define MALTA_RESET_BASE 0x1f000500
+#define GORESET 0x42
+
#endif /* _MIPS_ASM_MALTA_H */
@@ -8,6 +8,9 @@
#include <common.h>
+#include <asm/io.h>
+#include <asm/malta.h>
+
phys_size_t initdram(int board_type)
{
return CONFIG_SYS_MEM_SIZE;
@@ -18,3 +21,11 @@ int checkboard(void)
puts("Board: MIPS Malta CoreLV (Qemu)\n");
return 0;
}
+
+void _machine_restart(void)
+{
+ void __iomem *reset_base;
+
+ reset_base = (void __iomem *)CKSEG1ADDR(MALTA_RESET_BASE);
+ __raw_writel(GORESET, reset_base);
+}
The MIPS Malta board has a SOFTRES register. Writing a magic value into that register initiates a board reset. Use this feature to implement reset support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> --- Changes since v2: - don't use le32_to_cpu accessor, it is not needed because the __raw_* IO accessors has been fixed mainline - rebased against the master branch of git.denx.de/u-boot.git Changes since v1: - rebased against mips/testing Changes since RFC: --- Screenshot: U-Boot 2013.04-00238-g0320f0c (May 21 2013 - 22:31:20) Board: MIPS Malta CoreLV (Qemu) DRAM: 256 MiB Using default environment In: serial Out: serial Err: serial qemu-malta # reset U-Boot 2013.04-00238-g0320f0c (May 21 2013 - 22:31:20) Board: MIPS Malta CoreLV (Qemu) DRAM: 256 MiB Using default environment In: serial Out: serial Err: serial qemu-malta # --- arch/mips/include/asm/malta.h | 3 +++ board/qemu-malta/qemu-malta.c | 11 +++++++++++ 2 files changed, 14 insertions(+)