Patchwork [RFC,v1,20/20] q35-mch: move ram initialization into q35-mch

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Submitter Hu Tao
Date May 22, 2013, 5:33 a.m.
Message ID <f6e84e85bebc0f38272a449558981134b06cd2e6.1369193012.git.hutao@cn.fujitsu.com>
Download mbox | patch
Permalink /patch/245519/
State New
Headers show

Comments

Hu Tao - May 22, 2013, 5:33 a.m.
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
 hw/i386/pc_q35.c          |  7 ++-----
 hw/pci-host/q35.c         | 36 +++++++++++++++++++++++++++++++-----
 include/hw/pci-host/q35.h |  9 +++++++--
 3 files changed, 40 insertions(+), 12 deletions(-)

Patch

diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index a6d1eae..32c882e 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -65,7 +65,6 @@  static void pc_q35_init(QEMUMachineInitArgs *args)
     ISADevice *rtc_state;
     ISADevice *floppy;
     MemoryRegion *rom_memory;
-    MemoryRegion *ram_memory;
     GSIState *gsi_state;
     ISABus *isa_bus;
     int pci_enabled = 1;
@@ -108,7 +107,7 @@  static void pc_q35_init(QEMUMachineInitArgs *args)
     if (!xen_enabled()) {
         pc_memory_init(get_system_memory(), kernel_filename, kernel_cmdline,
                        initrd_filename, below_4g_mem_size, above_4g_mem_size,
-                       rom_memory, &ram_memory);
+                       rom_memory);
     }
 
     /* irq lines */
@@ -121,11 +120,9 @@  static void pc_q35_init(QEMUMachineInitArgs *args)
         gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
     }
 
-    q35_host->mch.ram_memory = ram_memory;
+    q35_host->mch.ram_size = ram_size;
     q35_host->mch.system_memory = get_system_memory();
     q35_host->mch.address_space_io = get_system_io();
-    q35_host->mch.below_4g_mem_size = below_4g_mem_size;
-    q35_host->mch.above_4g_mem_size = above_4g_mem_size;
     /* pci */
     qdev_init_nofail(DEVICE(q35_host));
     host_bus = q35_host->host.pci.bus;
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index c57ab06..dddfc3c 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -243,24 +243,50 @@  static int mch_init(PCIDevice *d)
 {
     int i;
     hwaddr pci_hole64_size;
+    hwaddr below_4g_mem_size, above_4g_mem_size;
     MCHPCIState *mch = MCH_PCI_DEVICE(d);
 
+    if(mch->ram_size > MCH_PCI_HOLE) {
+        below_4g_mem_size = MCH_PCI_HOLE;
+        above_4g_mem_size = mch->ram_size - MCH_PCI_HOLE;
+    } else {
+        below_4g_mem_size = mch->ram_size;
+        above_4g_mem_size = 0;
+    }
+
+    /* Allocate RAM.  We allocate it as a single memory region and use
+     * aliases to address portions of it, mostly for backwards compatibility
+     * with older qemus that used qemu_ram_alloc().
+     */
+    memory_region_init_ram(&mch->ram, "pc.ram",
+                           below_4g_mem_size + above_4g_mem_size);
+    vmstate_register_ram_global(&mch->ram);
+    memory_region_init_alias(&mch->ram_below_4g, "ram-below-4g", &mch->ram,
+                             0, below_4g_mem_size);
+    memory_region_add_subregion(mch->system_memory, 0, &mch->ram_below_4g);
+    if (above_4g_mem_size > 0) {
+        memory_region_init_alias(&mch->ram_above_4g, "ram-above-4g", &mch->ram,
+                                 below_4g_mem_size, above_4g_mem_size);
+        memory_region_add_subregion(mch->system_memory, MCH_PCI_HOLE_END,
+                                    &mch->ram_above_4g);
+    }
+
     /* setup pci memory regions */
     memory_region_init_alias(&mch->pci_hole, "pci-hole",
                              mch->pci_address_space,
-                             mch->below_4g_mem_size,
-                             0x100000000ULL - mch->below_4g_mem_size);
-    memory_region_add_subregion(mch->system_memory, mch->below_4g_mem_size,
+                             below_4g_mem_size,
+                             0x100000000ULL - below_4g_mem_size);
+    memory_region_add_subregion(mch->system_memory, below_4g_mem_size,
                                 &mch->pci_hole);
     pci_hole64_size = (sizeof(hwaddr) == 4 ? 0 :
                        ((uint64_t)1 << 62));
     memory_region_init_alias(&mch->pci_hole_64bit, "pci-hole64",
                              mch->pci_address_space,
-                             0x100000000ULL + mch->above_4g_mem_size,
+                             0x100000000ULL + above_4g_mem_size,
                              pci_hole64_size);
     if (pci_hole64_size) {
         memory_region_add_subregion(mch->system_memory,
-                                    0x100000000ULL + mch->above_4g_mem_size,
+                                    0x100000000ULL + above_4g_mem_size,
                                     &mch->pci_hole_64bit);
     }
     /* smram */
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
index 1c02420..1e985b4 100644
--- a/include/hw/pci-host/q35.h
+++ b/include/hw/pci-host/q35.h
@@ -53,8 +53,10 @@  typedef struct MCHPCIState {
     MemoryRegion pci_hole;
     MemoryRegion pci_hole_64bit;
     uint8_t smm_enabled;
-    ram_addr_t below_4g_mem_size;
-    ram_addr_t above_4g_mem_size;
+    ram_addr_t ram_size;
+    MemoryRegion ram;
+    MemoryRegion ram_below_4g;
+    MemoryRegion ram_above_4g;
 } MCHPCIState;
 
 typedef struct Q35PCIHost {
@@ -147,4 +149,7 @@  typedef struct Q35PCIHost {
 #define MCH_PCIE_DEV                           1
 #define MCH_PCIE_FUNC                          0
 
+#define MCH_PCI_HOLE       0xB0000000ULL
+#define MCH_PCI_HOLE_END   0x100000000ULL
+
 #endif /* HW_Q35_H */