From patchwork Wed May 22 05:33:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hu Tao X-Patchwork-Id: 245512 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 9BC0A2C007C for ; Wed, 22 May 2013 15:36:58 +1000 (EST) Received: from localhost ([::1]:38068 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uf1jM-0005b6-Qc for incoming@patchwork.ozlabs.org; Wed, 22 May 2013 01:36:56 -0400 Received: from eggs.gnu.org ([208.118.235.92]:58492) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uf1gx-0002Re-AL for qemu-devel@nongnu.org; Wed, 22 May 2013 01:34:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Uf1go-0008UQ-1h for qemu-devel@nongnu.org; Wed, 22 May 2013 01:34:27 -0400 Received: from [222.73.24.84] (port=23659 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uf1gn-0008Rl-Lu for qemu-devel@nongnu.org; Wed, 22 May 2013 01:34:17 -0400 X-IronPort-AV: E=Sophos;i="4.87,719,1363104000"; d="scan'208";a="7330819" Received: from unknown (HELO tang.cn.fujitsu.com) ([10.167.250.3]) by song.cn.fujitsu.com with ESMTP; 22 May 2013 13:31:12 +0800 Received: from fnstmail02.fnst.cn.fujitsu.com (tang.cn.fujitsu.com [127.0.0.1]) by tang.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id r4M5Y02m022016; Wed, 22 May 2013 13:34:00 +0800 Received: from G08FNSTD100614.fnst.cn.fujitsu.com ([10.167.233.156]) by fnstmail02.fnst.cn.fujitsu.com (Lotus Domino Release 8.5.3) with ESMTP id 2013052213324222-1422184 ; Wed, 22 May 2013 13:32:42 +0800 From: Hu Tao To: qemu-devel@nongnu.org Date: Wed, 22 May 2013 13:33:10 +0800 Message-Id: X-Mailer: git-send-email 1.8.2.3 In-Reply-To: References: X-MIMETrack: Itemize by SMTP Server on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/05/22 13:32:42, Serialize by Router on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/05/22 13:32:43, Serialize complete at 2013/05/22 13:32:43 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 222.73.24.84 Cc: Vasilis Liaskovitis , Jan Kiszka , Anthony Liguori , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Wanpeng Li Subject: [Qemu-devel] [RFC PATCH v1 06/20] piix3: prepare for composition X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Anthony Liguori Signed-off-by: Hu Tao --- hw/pci-host/piix.c | 32 ++++++++++++++++++++------------ 1 file changed, 20 insertions(+), 12 deletions(-) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index f96835b..021da6e 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -59,6 +59,9 @@ typedef struct I440FXState { */ #define RCR_IOPORT 0xcf9 +#define TYPE_PIIX3 "PIIX3" +#define PIIX3(obj) OBJECT_CHECK(PIIX3State, (obj), TYPE_PIIX3) + typedef struct PIIX3State { PCIDevice dev; @@ -434,9 +437,9 @@ static void piix3_write_config_xen(PCIDevice *dev, piix3_write_config(dev, address, val, len); } -static void piix3_reset(void *opaque) +static void piix3_reset(DeviceState *dev) { - PIIX3State *d = opaque; + PIIX3State *d = PIIX3(dev); uint8_t *pci_conf = d->dev.config; pci_conf[0x04] = 0x07; /* master, memory and I/O */ @@ -511,7 +514,7 @@ static const VMStateDescription vmstate_piix3_rcr = { }; static const VMStateDescription vmstate_piix3 = { - .name = "PIIX3", + .name = TYPE_PIIX3, .version_id = 3, .minimum_version_id = 2, .minimum_version_id_old = 2, @@ -557,20 +560,23 @@ static const MemoryRegionOps rcr_ops = { .endianness = DEVICE_LITTLE_ENDIAN }; -static int piix3_initfn(PCIDevice *dev) +static int piix3_realize(PCIDevice *dev) { - PIIX3State *d = DO_UPCAST(PIIX3State, dev, dev); + PIIX3State *s = PIIX3(dev); - isa_bus_new(DEVICE(d), pci_address_space_io(dev)); + isa_bus_new(DEVICE(s), pci_address_space_io(dev)); - memory_region_init_io(&d->rcr_mem, &rcr_ops, d, "piix3-reset-control", 1); + memory_region_init_io(&s->rcr_mem, &rcr_ops, s, "piix3-reset-control", 1); memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT, - &d->rcr_mem, 1); + &s->rcr_mem, 1); - qemu_register_reset(piix3_reset, d); return 0; } +static void piix3_initfn(Object *obj) +{ +} + static void piix3_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -578,9 +584,10 @@ static void piix3_class_init(ObjectClass *klass, void *data) dc->desc = "ISA bridge"; dc->vmsd = &vmstate_piix3; - dc->no_user = 1, + dc->no_user = 1; + dc->reset = piix3_reset; k->no_hotplug = 1; - k->init = piix3_initfn; + k->init = piix3_realize; k->config_write = piix3_write_config; k->vendor_id = PCI_VENDOR_ID_INTEL; /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */ @@ -589,9 +596,10 @@ static void piix3_class_init(ObjectClass *klass, void *data) } static const TypeInfo piix3_info = { - .name = "PIIX3", + .name = TYPE_PIIX3, .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX3State), + .instance_init = piix3_initfn, .class_init = piix3_class_init, };