From patchwork Tue May 21 16:41:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 245361 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id E3B702C110D for ; Wed, 22 May 2013 02:49:03 +1000 (EST) Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 65C952C00E6 for ; Wed, 22 May 2013 02:42:23 +1000 (EST) Received: by mail-ee0-f49.google.com with SMTP id d17so544038eek.22 for ; Tue, 21 May 2013 09:42:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=BB84WAmBnCoAnyH2shIxS22ziVhS2+FLwMYu9CLEvNM=; b=JdIM56IGjJ9gttGHvSCmpr46WKTEZkvvgMKs9e0O/X+oZ+eg172bxjJW7pd4C0vHHK 48FlF1L1QQIUeO+A+T+8k0z1D9y6pUxMFfjZ9xSkvjPu8FmJa25icdv+mhWxzpi6z3C5 P1+2dGsYRPbgsyX5LxVh0FTtgNKpE8ELu4EHfn1yDxAIBHAMroVGJCnScww3Snelzo3X g0KAcZvSvPFG54I90eZW7JMCRpYgJC+aWepPaKfUVRv/Erl3QIfbBMiy7JW/6OSsfbHm O5BixvNwcW27A6i9KfYsTXramwsS54WefZakATLpiUHA45xF51cgm16KNdqzO90Dyvi0 IElw== X-Received: by 10.15.82.201 with SMTP id a49mr8312496eez.44.1369154539940; Tue, 21 May 2013 09:42:19 -0700 (PDT) Received: from topkick.lan (dslc-082-083-251-181.pools.arcor-ip.net. [82.83.251.181]) by mx.google.com with ESMTPSA id w43sm4631620eeg.14.2013.05.21.09.42.17 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 21 May 2013 09:42:19 -0700 (PDT) Received: from edge.wm.mst.uni-hannover.de (firewall.mst.uni-hannover.de [130.75.30.51]) by topkick.lan (Postfix) with ESMTPSA id D3653605D9; Tue, 21 May 2013 18:41:30 +0200 (CEST) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH v4 10/12] ARM: kirkwood: remove legacy clk alias for mv643xx_eth Date: Tue, 21 May 2013 18:41:48 +0200 Message-Id: <1369154510-4927-11-git-send-email-sebastian.hesselbarth@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1369154510-4927-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1367854420-8006-1-git-send-email-sebastian.hesselbarth@gmail.com> <1369154510-4927-1-git-send-email-sebastian.hesselbarth@gmail.com> Cc: Andrew Lunn , Jason Cooper , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, David Miller , Lennert Buytenhek X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" With all boards converted to DT enabled mv643xx_eth we can now remove the clock alias for gbe clocks. The workaround for ge0/ge1 clock gates is not removed, as Kirkwood ethernet controllers loose MAC address stored in internal registers on gated ge0/ge1 clocks. Signed-off-by: Sebastian Hesselbarth --- Note: I confirm that the above workaround is still required, i.e. when booting DT kernel with non-DT boot loader (no local-mac-address property) MAC address registers looses its content on clock gating. Cc: David Miller Cc: Lennert Buytenhek Cc: Jason Cooper Cc: Andrew Lunn Cc: Benjamin Herrenschmidt Cc: netdev@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org --- arch/arm/mach-kirkwood/board-dt.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c index e9647b8..8db388a 100644 --- a/arch/arm/mach-kirkwood/board-dt.c +++ b/arch/arm/mach-kirkwood/board-dt.c @@ -66,12 +66,10 @@ static void __init kirkwood_legacy_clk_init(void) */ clkspec.args[0] = CGC_BIT_GE0; clk = of_clk_get_from_provider(&clkspec); - orion_clkdev_add(NULL, "mv643xx_eth_port.0", clk); clk_prepare_enable(clk); clkspec.args[0] = CGC_BIT_GE1; clk = of_clk_get_from_provider(&clkspec); - orion_clkdev_add(NULL, "mv643xx_eth_port.1", clk); clk_prepare_enable(clk); }