From patchwork Tue May 21 06:32:16 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 245201 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 66DDD2C00A8 for ; Tue, 21 May 2013 16:37:27 +1000 (EST) Received: from localhost ([::1]:53345 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UegCL-0001BB-KU for incoming@patchwork.ozlabs.org; Tue, 21 May 2013 02:37:25 -0400 Received: from eggs.gnu.org ([208.118.235.92]:51983) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UegBZ-0000Qa-Pw for qemu-devel@nongnu.org; Tue, 21 May 2013 02:36:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UegBY-00056A-DH for qemu-devel@nongnu.org; Tue, 21 May 2013 02:36:37 -0400 Received: from mail-pb0-x231.google.com ([2607:f8b0:400e:c01::231]:45399) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UegBY-00055z-49 for qemu-devel@nongnu.org; Tue, 21 May 2013 02:36:36 -0400 Received: by mail-pb0-f49.google.com with SMTP id rp8so288371pbb.22 for ; Mon, 20 May 2013 23:36:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=1QVS5cRd1ODVUBEE2do09INIYvDPObDpUNEAWEqddh4=; b=f+kMESe4fy1Wt5JEh8aepqUtWpuZ4i9p7a+Tn4nXRw3IiUa7yo7xCiDv9nla8oA4G+ o/N0SXytGStUxsOLBg8o4trxceqWUuAmwaaWGJo//KlbZQmL/Dw9Rw9Su3hQz2uMwZ68 V3ypB/ydkdZFHf/gir8qTqWolCxB6waE2FjVhTQjIQ8+n/VfMHyEsBzBTmFdCMvnuOig 43c0WTT6BhzUAspSkLz4qeecuGvVV4PtN+hf2Spabq7fjbvZCwGyBQWnA7PCQjAwF9rh 3DY1/LEHU0ILE1ux46vmqz0yubNlKH7/PWrfMMyBJwo1pTtmKK6VBgQIPFV7KDRKbKyU Nkcw== X-Received: by 10.68.101.226 with SMTP id fj2mr1246981pbb.6.1369118195345; Mon, 20 May 2013 23:36:35 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id fr1sm1441461pbb.26.2013.05.20.23.36.31 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Mon, 20 May 2013 23:36:34 -0700 (PDT) From: peter.crosthwaite@xilinx.com To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Tue, 21 May 2013 16:32:16 +1000 Message-Id: X-Mailer: git-send-email 1.8.3.rc1.44.gb387c77.dirty In-Reply-To: References: X-Gm-Message-State: ALoCoQmUsrBomLHL4TpZY4yeI8gQf5iQ8eVmkMK58+JjvxipnqgjG+AmUiTpH4sOE8mKI57ixuc9 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c01::231 Cc: edgar.iglesias@gmail.com Subject: [Qemu-devel] [PATCH arm-devs v4 05/15] xilinx_spips: Fix QSPI FIFO size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Crosthwaite QSPI has a bigger FIFO than the regular SPI controller. Differentiate between the two with correct FIFO sizes for each. This is the first piece of class data for SPIPS, so this patch sees the creation of the XilinxSPIPSClass definition and assoicated QOM constructs. Signed-off-by: Peter Crosthwaite Reviewed-by: Peter Maydell Reviewed-by: Edgar E. Iglesias --- changed from v3: removed space after sizeof (PMM review) changed from v1: Reimplemented using class data (PMM review) hw/ssi/xilinx_spips.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index 29636ce..86f33ef 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -106,6 +106,9 @@ #define RXFF_A 32 #define TXFF_A 32 +#define RXFF_A_Q (64 * 4) +#define TXFF_A_Q (64 * 4) + /* 16MB per linear region */ #define LQSPI_ADDRESS_BITS 24 /* Bite off 4k chunks at a time */ @@ -159,12 +162,23 @@ typedef struct { hwaddr lqspi_cached_addr; } XilinxQSPIPS; +typedef struct XilinxSPIPSClass { + SysBusDeviceClass parent_class; + + uint32_t rx_fifo_size; + uint32_t tx_fifo_size; +} XilinxSPIPSClass; #define TYPE_XILINX_SPIPS "xlnx.ps7-spi" #define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi" #define XILINX_SPIPS(obj) \ OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS) +#define XILINX_SPIPS_CLASS(klass) \ + OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS) +#define XILINX_SPIPS_GET_CLASS(obj) \ + OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS) + #define XILINX_QSPIPS(obj) \ OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS) @@ -531,6 +545,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp) { XilinxSPIPS *s = XILINX_SPIPS(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + XilinxSPIPSClass *xsc = XILINX_SPIPS_GET_CLASS(s); int i; DB_PRINT("realized spips\n"); @@ -555,8 +570,8 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp) s->irqline = -1; - fifo8_create(&s->rx_fifo, RXFF_A); - fifo8_create(&s->tx_fifo, TXFF_A); + fifo8_create(&s->rx_fifo, xsc->rx_fifo_size); + fifo8_create(&s->tx_fifo, xsc->tx_fifo_size); } static void xilinx_qspips_realize(DeviceState *dev, Error **errp) @@ -611,18 +626,25 @@ static Property xilinx_spips_properties[] = { static void xilinx_qspips_class_init(ObjectClass *klass, void * data) { DeviceClass *dc = DEVICE_CLASS(klass); + XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass); dc->realize = xilinx_qspips_realize; + xsc->rx_fifo_size = RXFF_A_Q; + xsc->tx_fifo_size = TXFF_A_Q; } static void xilinx_spips_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass); dc->realize = xilinx_spips_realize; dc->reset = xilinx_spips_reset; dc->props = xilinx_spips_properties; dc->vmsd = &vmstate_xilinx_spips; + + xsc->rx_fifo_size = RXFF_A; + xsc->tx_fifo_size = TXFF_A; } static const TypeInfo xilinx_spips_info = { @@ -630,6 +652,7 @@ static const TypeInfo xilinx_spips_info = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(XilinxSPIPS), .class_init = xilinx_spips_class_init, + .class_size = sizeof(XilinxSPIPSClass), }; static const TypeInfo xilinx_qspips_info = {