From patchwork Mon May 20 23:21:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergey Yanovich X-Patchwork-Id: 245140 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-ee0-f55.google.com (mail-ee0-f55.google.com [74.125.83.55]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 452122C00E3 for ; Tue, 21 May 2013 09:21:43 +1000 (EST) Received: by mail-ee0-f55.google.com with SMTP id d4sf68eek.20 for ; Mon, 20 May 2013 16:21:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=mime-version:x-beenthere:from:to:cc:subject:date:message-id :x-mailer:x-original-sender:x-original-authentication-results :reply-to:precedence:mailing-list:list-id:x-google-group-id :list-post:list-help:list-archive:sender:list-subscribe :list-unsubscribe:content-type; bh=qAffW5FLe5X9JofzciuBJfkOFdX/yQCzvYio/e5+w2c=; b=NjJHyodcap7pfoq1WCaxoXlJTidZEXE9nzyTKxdCWqaVq75CO9bL+0ail0G15+h4qy /kd89kOmq4sSNRIAoLTAzcFCuZQnlTMtnnj9ydDrlZrNPfTll5/XqPNVG7YmTAqMWXQ/ mSI8GiWEou9mgcdbMqvxL44YicPpoYwxhQhz+s2uyPrLyVgOIsDhtNdmwcC4x6bMPRIj XwFDQrj/FDmAc6EeGfwWtN4XcA2narnK7m3mR1nETCVxODDJdmNA2aZgDuCIOAGU/X6/ Nfo4gNkYtee/AHIjFWAiXdP3qTZmSfHt7Bk9LWPm1l246dKnhOQJioIX2cu5p/w2AkLq m0HA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:x-beenthere:from:to:cc:subject:date:message-id :x-mailer:x-original-sender:x-original-authentication-results :reply-to:precedence:mailing-list:list-id:x-google-group-id :list-post:list-help:list-archive:sender:list-subscribe :list-unsubscribe:content-type; bh=qAffW5FLe5X9JofzciuBJfkOFdX/yQCzvYio/e5+w2c=; b=o62w7g7FOIjTH3es56ItATL/Vt7onJoXwJZuv/wSfYoU7iEep6bzpdkqCcfn4fe1mn SYcwhxo3Y5P3CU4a/SqM3aFV8t+4vdVmGaQ0LSeUCsZ24qwURaEjAHo4CICMKc08+uTU X7SDdkQiwZz+Vd07KOxMLNnQqcZb6mBRwBVXXmldpbwqsGkeKvBK4RYp6N85vk4YVDw8 GM+hQanvRH8sLGQ61rtpNoKd21Ikl6on/nd2cipp6dlVmPWUJ+JiiOsfrKi+cNOwjC9I 3Gjg3sz1AOBEKJfytEMmIrtg9+xgBDoYfOgLXm0OixxDB7BBK2/fFYfy0De26CqCAKQ4 1bsA== X-Received: by 10.180.106.201 with SMTP id gw9mr784194wib.7.1369092100222; Mon, 20 May 2013 16:21:40 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.180.182.17 with SMTP id ea17ls969080wic.42.canary; Mon, 20 May 2013 16:21:39 -0700 (PDT) X-Received: by 10.204.183.197 with SMTP id ch5mr6588858bkb.3.1369092099592; Mon, 20 May 2013 16:21:39 -0700 (PDT) Received: from mail-la0-x232.google.com (mail-la0-x232.google.com [2a00:1450:4010:c03::232]) by gmr-mx.google.com with ESMTPS id cm16si2126226bkb.0.2013.05.20.16.21.39 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 20 May 2013 16:21:39 -0700 (PDT) Received-SPF: pass (google.com: domain of ynvich@gmail.com designates 2a00:1450:4010:c03::232 as permitted sender) client-ip=2a00:1450:4010:c03::232; Received: by mail-la0-f50.google.com with SMTP id ed20so6973159lab.37 for ; Mon, 20 May 2013 16:21:39 -0700 (PDT) X-Received: by 10.152.26.225 with SMTP id o1mr7427294lag.43.1369092099252; Mon, 20 May 2013 16:21:39 -0700 (PDT) Received: from host5.s2.wicon.ru ([195.96.87.210]) by mx.google.com with ESMTPSA id w8sm1841970laz.0.2013.05.20.16.21.37 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 20 May 2013 16:21:38 -0700 (PDT) From: Sergey Yanovich To: rtc-linux@googlegroups.com, linux-kernel@vger.kernel.org Cc: Sergey Yanovich , Marc Zyngier , Alessandro Zummo Subject: [rtc-linux] [PATCH] rtc-ds1302: handle write protection Date: Tue, 21 May 2013 03:21:30 +0400 Message-Id: <1369092090-5384-1-git-send-email-ynvich@gmail.com> X-Mailer: git-send-email 1.7.10.4 X-Original-Sender: ynvich@gmail.com X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: domain of ynvich@gmail.com designates 2a00:1450:4010:c03::232 as permitted sender) smtp.mail=ynvich@gmail.com; dkim=pass header.i=@gmail.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , This chip has a control register and can prevent altering saved clock. Without this patch we could have: ----8<---- (arm)root@pac14:~# date Tue May 21 03:08:27 MSK 2013 (arm)root@pac14:~# /etc/init.d/hwclock.sh show Tue May 21 11:13:58 2013 -0.067322 seconds (arm)root@pac14:~# /etc/init.d/hwclock.sh stop [info] Saving the system clock. [info] Hardware Clock updated to Tue May 21 03:09:01 MSK 2013. (arm)root@pac14:~# /etc/init.d/hwclock.sh show Tue May 21 11:14:15 2013 -0.624272 seconds ----8<---- Signed-off-by: Sergey Yanovich --- drivers/rtc/rtc-ds1302.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/rtc/rtc-ds1302.c b/drivers/rtc/rtc-ds1302.c index 73eafb9..626aec2 100644 --- a/drivers/rtc/rtc-ds1302.c +++ b/drivers/rtc/rtc-ds1302.c @@ -23,8 +23,12 @@ #define RTC_CMD_READ 0x81 /* Read command */ #define RTC_CMD_WRITE 0x80 /* Write command */ +#define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */ +#define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */ + #define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */ #define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */ +#define RTC_ADDR_CTRL 0x07 /* Address of control register */ #define RTC_ADDR_YEAR 0x06 /* Address of year register */ #define RTC_ADDR_DAY 0x05 /* Address of day of week register */ #define RTC_ADDR_MON 0x04 /* Address of month register */ @@ -313,6 +317,7 @@ static int __init ds1302_rtc_probe(struct platform_device *pdev) return PTR_ERR(rtc); platform_set_drvdata(pdev, rtc); + ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_ENABLE); return 0; } @@ -321,6 +326,7 @@ static int ds1302_rtc_remove(struct platform_device *pdev) { struct rtc_device *rtc = platform_get_drvdata(pdev); + ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_DISABLE); rtc_device_unregister(rtc); platform_set_drvdata(pdev, NULL);