From patchwork Mon May 20 23:13:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Meissner X-Patchwork-Id: 245133 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id CB9C72C00D8 for ; Tue, 21 May 2013 09:13:28 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:references:mime-version:content-type :in-reply-to; q=dns; s=default; b=qwt1E/Pe8PPYM9J6wV9mlc6rroW/De YpUSxjYToHXSokLH535ugzqwiDZqHFpXpodv3zzKFpFqPv7obl+/CCZuBdiuOHPp OmQLNo9YtRGbxQZXFMbF2Um/LU2PGbr2NOI171XBALNnHMlxT/qx0oJe2ZppHi5x GhDTeqm2D0yzQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:references:mime-version:content-type :in-reply-to; s=default; bh=qKTap+uARVooc6rarJgzpKxevBo=; b=HaV0 dWy2kg4U5+Rt9qtC8+e+jUF2/jvrrlzV7p8K1Szg7hfxUoM9vkxKZGKRsda/+m0f 3zy9h9tgwX7v054NCVPQr3EClmqkktVAOkHLfEVRI8EHz8KLFDaPabwgPnsLWRGj 4gm0WoiVIe5ywnFdxTJOM7YQ0jkA4xtqy1dneAE= Received: (qmail 23230 invoked by alias); 20 May 2013 23:13:20 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 23215 invoked by uid 89); 20 May 2013 23:13:19 -0000 X-Spam-SWARE-Status: No, score=-3.1 required=5.0 tests=AWL, BAYES_50, KHOP_RCVD_UNTRUST, RCVD_IN_HOSTKARMA_W, RCVD_IN_HOSTKARMA_WL autolearn=ham version=3.3.1 Received: from e38.co.us.ibm.com (HELO e38.co.us.ibm.com) (32.97.110.159) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Mon, 20 May 2013 23:13:14 +0000 Received: from /spool/local by e38.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 20 May 2013 17:13:10 -0600 Received: from d03relay01.boulder.ibm.com (d03relay01.boulder.ibm.com [9.17.195.226]) by d03dlp03.boulder.ibm.com (Postfix) with ESMTP id 94B5719D8036 for ; Mon, 20 May 2013 17:13:02 -0600 (MDT) Received: from d03av05.boulder.ibm.com (d03av05.boulder.ibm.com [9.17.195.85]) by d03relay01.boulder.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id r4KND9V2131138 for ; Mon, 20 May 2013 17:13:09 -0600 Received: from d03av05.boulder.ibm.com (loopback [127.0.0.1]) by d03av05.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id r4KND81W001630 for ; Mon, 20 May 2013 17:13:08 -0600 Received: from ibm-tiger.the-meissners.org (dhcp-9-32-77-206.usma.ibm.com [9.32.77.206]) by d03av05.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id r4KND8DS001621; Mon, 20 May 2013 17:13:08 -0600 Received: by ibm-tiger.the-meissners.org (Postfix, from userid 500) id E4C8C4216E; Mon, 20 May 2013 19:13:07 -0400 (EDT) Date: Mon, 20 May 2013 19:13:07 -0400 From: Michael Meissner To: Michael Meissner , gcc-patches@gcc.gnu.org, dje.gcc@gmail.com, pthaugen@us.ibm.com, bergner@vnet.ibm.com Subject: Re: [PATCH, rs6000] power8 patches, patch #2, add crypto builtins Message-ID: <20130520231307.GA538@ibm-tiger.the-meissners.org> Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, dje.gcc@gmail.com, pthaugen@us.ibm.com, bergner@vnet.ibm.com References: <20130520204053.GA21090@ibm-tiger.the-meissners.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20130520204053.GA21090@ibm-tiger.the-meissners.org> User-Agent: Mutt/1.5.20 (2009-12-10) X-TM-AS-MML: No X-Content-Scanned: Fidelis XPS MAILER x-cbid: 13052023-5518-0000-0000-00000ED537DD X-Virus-Found: No This patch adds the builtins for the new ISA 2.07 crypto instructions. It bootstraps and causes no regressions, is it ok to install after patch #1 has been applied? [gcc] 2013-05-20 Michael Meissner * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): Add documentation for the power8 crypto builtins. * config/rs6000/t-rs6000 (MD_INCLUDES): Add crypto.md. * config/rs6000/rs6000-builtin.def (BU_P8V_AV_1): Add support macros for defining power8 builtin functions. (BU_P8V_AV_2): Likewise. (BU_P8V_AV_P): Likewise. (BU_P8V_VSX_1): Likewise. (BU_P8V_OVERLOAD_1): Likewise. (BU_P8V_OVERLOAD_2): Likewise. (BU_CRYPTO_1): Likewise. (BU_CRYPTO_2): Likewise. (BU_CRYPTO_3): Likewise. (BU_CRYPTO_OVERLOAD_1): Likewise. (BU_CRYPTO_OVERLOAD_2): Likewise. (XSCVSPDP): Fix typo, point to the correct instruction. (VCIPHER): Add power8 crypto builtins. (VCIPHERLAST): Likewise. (VNCIPHER): Likewise. (VNCIPHERLAST): Likewise. (VPMSUMB): Likewise. (VPMSUMH): Likewise. (VPMSUMW): Likewise. (VPERMXOR_V2DI): Likewise. (VPERMXOR_V4SI: Likewise. (VPERMXOR_V8HI: Likewise. (VPERMXOR_V16QI: Likewise. (VSHASIGMAW): Likewise. (VSHASIGMAD): Likewise. (VPMSUM): Likewise. (VPERMXOR): Likewise. (VSHASIGMA): Likewise. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define __CRYPTO__ if the crypto instructions are available. (altivec_overloaded_builtins): Add support for overloaded power8 builtins. * config/rs6000/rs6000.c (rs6000_expand_ternop_builtin): Add support for power8 crypto builtins. (builtin_function_type): Likewise. (altivec_init_builtins): Add support for builtins that take vector long long (V2DI) arguments. * config/rs6000/crypto.md: New file, define power8 crypto instructions. [gcc/testsuite] 2013-05-20 Michael Meissner * gcc.target/powerpc/crypto-builtin-1.c: New file, test for power8 crypto builtins. Index: gcc/doc/extend.texi =================================================================== --- gcc/doc/extend.texi (revision 199037) +++ gcc/doc/extend.texi (working copy) @@ -13937,6 +13937,66 @@ if the VSX instruction set is available. @samp{vec_vsx_st} built-in functions always generate the VSX @samp{LXVD2X}, @samp{LXVW4X}, @samp{STXVD2X}, and @samp{STXVW4X} instructions. +If the cryptographic instructions are enabled (@option{-mcrypto} or +@option{-mcpu=power8}), the following builtins are enabled. + +@smallexample +vector unsigned long long __builtin_crypto_vsbox (vector unsigned long long); + +vector unsigned long long __builtin_crypto_vcipher (vector unsigned long long, + vector unsigned long long); + +vector unsigned long long __builtin_crypto_vcipherlast + (vector unsigned long long, + vector unsigned long long); + +vector unsigned long long __builtin_crypto_vncipher (vector unsigned long long, + vector unsigned long long); + +vector unsigned long long __builtin_crypto_vncipherlast + (vector unsigned long long, + vector unsigned long long); + +vector unsigned char __builtin_crypto_vpermxor (vector unsigned char, + vector unsigned char, + vector unsigned char); + +vector unsigned short __builtin_crypto_vpermxor (vector unsigned short, + vector unsigned short, + vector unsigned short); + +vector unsigned int __builtin_crypto_vpermxor (vector unsigned int, + vector unsigned int, + vector unsigned int); + +vector unsigned long long __builtin_crypto_vpermxor (vector unsigned long long, + vector unsigned long long, + vector unsigned long long); + +vector unsigned char __builtin_crypto_vpmsumb (vector unsigned char, + vector unsigned char); + +vector unsigned short __builtin_crypto_vpmsumb (vector unsigned short, + vector unsigned short); + +vector unsigned int __builtin_crypto_vpmsumb (vector unsigned int, + vector unsigned int); + +vector unsigned long long __builtin_crypto_vpmsumb (vector unsigned long long, + vector unsigned long long); + +vector unsigned long long __builtin_crypto_vshasigmad + (vector unsigned long long, int, int); + +vector unsigned int __builtin_crypto_vshasigmaw (vector unsigned int, + int, int); +@end smallexample + +The second argument to the @var{__builtin_crypto_vshasigmad} and +@var{__builtin_crypto_vshasigmaw} builtin functions must be a constant +integer that is 0 or 1. The third argument to these builtin functions +must be a constant integer in the range of 0 to 15. + @node RX Built-in Functions @subsection RX Built-in Functions GCC supports some of the RX instructions which cannot be expressed in Index: gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c (revision 0) +++ gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c (revision 0) @@ -0,0 +1,130 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */ + +typedef vector unsigned long long crypto_t; +typedef vector unsigned long long v2di_t; +typedef vector unsigned int v4si_t; +typedef vector unsigned short v8hi_t; +typedef vector unsigned char v16qi_t; + +crypto_t crpyto1 (crypto_t a) +{ + return __builtin_crypto_vsbox (a); +} + +crypto_t crypto2 (crypto_t a, crypto_t b) +{ + return __builtin_crypto_vcipher (a, b); +} + +crypto_t crypto3 (crypto_t a, crypto_t b) +{ + return __builtin_crypto_vcipherlast (a, b); +} + +crypto_t crypto4 (crypto_t a, crypto_t b) +{ + return __builtin_crypto_vncipher (a, b); +} + +crypto_t crypto5 (crypto_t a, crypto_t b) +{ + return __builtin_crypto_vncipherlast (a, b); +} + +v16qi_t crypto6a (v16qi_t a, v16qi_t b, v16qi_t c) +{ + return __builtin_crypto_vpermxor (a, b, c); +} + +v8hi_t crypto6b (v8hi_t a, v8hi_t b, v8hi_t c) +{ + return __builtin_crypto_vpermxor (a, b, c); +} + +v4si_t crypto6c (v4si_t a, v4si_t b, v4si_t c) +{ + return __builtin_crypto_vpermxor (a, b, c); +} + +v2di_t crypto6d (v2di_t a, v2di_t b, v2di_t c) +{ + return __builtin_crypto_vpermxor (a, b, c); +} + +v16qi_t crypto7a (v16qi_t a, v16qi_t b) +{ + return __builtin_crypto_vpmsumb (a, b); +} + +v16qi_t crypto7b (v16qi_t a, v16qi_t b) +{ + return __builtin_crypto_vpmsum (a, b); +} + +v8hi_t crypto7c (v8hi_t a, v8hi_t b) +{ + return __builtin_crypto_vpmsumh (a, b); +} + +v8hi_t crypto7d (v8hi_t a, v8hi_t b) +{ + return __builtin_crypto_vpmsum (a, b); +} + +v4si_t crypto7e (v4si_t a, v4si_t b) +{ + return __builtin_crypto_vpmsumw (a, b); +} + +v4si_t crypto7f (v4si_t a, v4si_t b) +{ + return __builtin_crypto_vpmsum (a, b); +} + +v2di_t crypto7g (v2di_t a, v2di_t b) +{ + return __builtin_crypto_vpmsumd (a, b); +} + +v2di_t crypto7h (v2di_t a, v2di_t b) +{ + return __builtin_crypto_vpmsum (a, b); +} + +v2di_t crypto8a (v2di_t a) +{ + return __builtin_crypto_vshasigmad (a, 0, 8); +} + +v2di_t crypto8b (v2di_t a) +{ + return __builtin_crypto_vshasigma (a, 0, 8); +} + +v4si_t crypto8c (v4si_t a) +{ + return __builtin_crypto_vshasigmaw (a, 1, 15); +} + +v4si_t crypto8d (v4si_t a) +{ + return __builtin_crypto_vshasigma (a, 1, 15); +} + +/* Note space is used after the instruction so that vcipherlast does not match + vcipher. */ +/* { dg-final { scan-assembler-times "vcipher " 1 } } */ +/* { dg-final { scan-assembler-times "vcipherlast " 1 } } */ +/* { dg-final { scan-assembler-times "vncipher " 1 } } */ +/* { dg-final { scan-assembler-times "vncipherlast " 1 } } */ +/* { dg-final { scan-assembler-times "vpermxor " 4 } } */ +/* { dg-final { scan-assembler-times "vpmsumb " 2 } } */ +/* { dg-final { scan-assembler-times "vpmsumd " 2 } } */ +/* { dg-final { scan-assembler-times "vpmsumh " 2 } } */ +/* { dg-final { scan-assembler-times "vpmsumw " 2 } } */ +/* { dg-final { scan-assembler-times "vsbox " 1 } } */ +/* { dg-final { scan-assembler-times "vshasigmad " 2 } } */ +/* { dg-final { scan-assembler-times "vshasigmaw " 2 } } */ Index: gcc/config/rs6000/t-rs6000 =================================================================== --- gcc/config/rs6000/t-rs6000 (revision 199037) +++ gcc/config/rs6000/t-rs6000 (working copy) @@ -70,6 +70,7 @@ MD_INCLUDES = $(srcdir)/config/rs6000/rs $(srcdir)/config/rs6000/vector.md \ $(srcdir)/config/rs6000/vsx.md \ $(srcdir)/config/rs6000/altivec.md \ + $(srcdir)/config/rs6000/crypto.md \ $(srcdir)/config/rs6000/spe.md \ $(srcdir)/config/rs6000/dfp.md \ $(srcdir)/config/rs6000/paired.md Index: gcc/config/rs6000/rs6000-builtin.def =================================================================== --- gcc/config/rs6000/rs6000-builtin.def (revision 199037) +++ gcc/config/rs6000/rs6000-builtin.def (working copy) @@ -30,7 +30,7 @@ RS6000_BUILTIN_A -- ABS builtins RS6000_BUILTIN_D -- DST builtins RS6000_BUILTIN_E -- SPE EVSEL builtins. - RS6000_BUILTIN_P -- Altivec and VSX predicate builtins + RS6000_BUILTIN_P -- Altivec, VSX, Power8 vector predicate builtins RS6000_BUILTIN_Q -- Paired floating point VSX predicate builtins RS6000_BUILTIN_S -- SPE predicate builtins RS6000_BUILTIN_X -- special builtins @@ -301,6 +301,108 @@ | RS6000_BTC_SPECIAL), \ CODE_FOR_nothing) /* ICODE */ +/* Power8 vector convenience macros. */ +/* For the instructions that are encoded as altivec instructions use + __builtin_altivec_ as the builtin name. */ +#define BU_P8V_AV_1(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_altivec_" NAME, /* NAME */ \ + RS6000_BTM_P8_VECTOR, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_UNARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +#define BU_P8V_AV_2(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_2 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_altivec_" NAME, /* NAME */ \ + RS6000_BTM_P8_VECTOR, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_BINARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +#define BU_P8V_AV_P(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_P (P8V_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_altivec_" NAME, /* NAME */ \ + RS6000_BTM_P8_VECTOR, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_PREDICATE), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +/* For the instructions encoded as VSX instructions use __builtin_vsx as the + builtin name. */ +#define BU_P8V_VSX_1(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_vsx_" NAME, /* NAME */ \ + RS6000_BTM_P8_VECTOR, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_UNARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +#define BU_P8V_OVERLOAD_1(ENUM, NAME) \ + RS6000_BUILTIN_1 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ + "__builtin_vec_" NAME, /* NAME */ \ + RS6000_BTM_P8_VECTOR, /* MASK */ \ + (RS6000_BTC_OVERLOADED /* ATTR */ \ + | RS6000_BTC_UNARY), \ + CODE_FOR_nothing) /* ICODE */ + +#define BU_P8V_OVERLOAD_2(ENUM, NAME) \ + RS6000_BUILTIN_2 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ + "__builtin_vec_" NAME, /* NAME */ \ + RS6000_BTM_P8_VECTOR, /* MASK */ \ + (RS6000_BTC_OVERLOADED /* ATTR */ \ + | RS6000_BTC_BINARY), \ + CODE_FOR_nothing) /* ICODE */ + +/* Crypto convenience macros. */ +#define BU_CRYPTO_1(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_crypto_" NAME, /* NAME */ \ + RS6000_BTM_CRYPTO, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_UNARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +#define BU_CRYPTO_2(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_crypto_" NAME, /* NAME */ \ + RS6000_BTM_CRYPTO, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_BINARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +#define BU_CRYPTO_3(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_crypto_" NAME, /* NAME */ \ + RS6000_BTM_CRYPTO, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_TERNARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +#define BU_CRYPTO_OVERLOAD_1(ENUM, NAME) \ + RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_crypto_" NAME, /* NAME */ \ + RS6000_BTM_CRYPTO, /* MASK */ \ + (RS6000_BTC_OVERLOADED /* ATTR */ \ + | RS6000_BTC_UNARY), \ + CODE_FOR_nothing) /* ICODE */ + +#define BU_CRYPTO_OVERLOAD_2(ENUM, NAME) \ + RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_crypto_" NAME, /* NAME */ \ + RS6000_BTM_CRYPTO, /* MASK */ \ + (RS6000_BTC_OVERLOADED /* ATTR */ \ + | RS6000_BTC_BINARY), \ + CODE_FOR_nothing) /* ICODE */ + +#define BU_CRYPTO_OVERLOAD_3(ENUM, NAME) \ + RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_crypto_" NAME, /* NAME */ \ + RS6000_BTM_CRYPTO, /* MASK */ \ + (RS6000_BTC_OVERLOADED /* ATTR */ \ + | RS6000_BTC_TERNARY), \ + CODE_FOR_nothing) /* ICODE */ + /* SPE convenience macros. */ #define BU_SPE_1(ENUM, NAME, ATTR, ICODE) \ RS6000_BUILTIN_1 (SPE_BUILTIN_ ## ENUM, /* ENUM */ \ @@ -1012,7 +1114,7 @@ BU_VSX_1 (XVTSQRTSP_FG, "xvtsqrtsp BU_VSX_1 (XVRESP, "xvresp", CONST, vsx_frev4sf2) BU_VSX_1 (XSCVDPSP, "xscvdpsp", CONST, vsx_xscvdpsp) -BU_VSX_1 (XSCVSPDP, "xscvspdp", CONST, vsx_xscvdpsp) +BU_VSX_1 (XSCVSPDP, "xscvspdp", CONST, vsx_xscvspdp) BU_VSX_1 (XVCVDPSP, "xvcvdpsp", CONST, vsx_xvcvdpsp) BU_VSX_1 (XVCVSPDP, "xvcvspdp", CONST, vsx_xvcvspdp) BU_VSX_1 (XSTSQRTDP_FE, "xstsqrtdp_fe", CONST, vsx_tsqrtdf2_fe) @@ -1132,6 +1234,35 @@ BU_VSX_OVERLOAD_2 (XXSPLTW, "xxspltw") BU_VSX_OVERLOAD_X (LD, "ld") BU_VSX_OVERLOAD_X (ST, "st") +/* 1 argument crypto functions. */ +BU_CRYPTO_1 (VSBOX, "vsbox", CONST, crypto_vsbox) + +/* 2 argument crypto functions. */ +BU_CRYPTO_2 (VCIPHER, "vcipher", CONST, crypto_vcipher) +BU_CRYPTO_2 (VCIPHERLAST, "vcipherlast", CONST, crypto_vcipherlast) +BU_CRYPTO_2 (VNCIPHER, "vncipher", CONST, crypto_vncipher) +BU_CRYPTO_2 (VNCIPHERLAST, "vncipherlast", CONST, crypto_vncipherlast) +BU_CRYPTO_2 (VPMSUMB, "vpmsumb", CONST, crypto_vpmsumb) +BU_CRYPTO_2 (VPMSUMH, "vpmsumh", CONST, crypto_vpmsumh) +BU_CRYPTO_2 (VPMSUMW, "vpmsumw", CONST, crypto_vpmsumw) +BU_CRYPTO_2 (VPMSUMD, "vpmsumd", CONST, crypto_vpmsumd) + +/* 3 argument crypto functions. */ +BU_CRYPTO_3 (VPERMXOR_V2DI, "vpermxor_v2di", CONST, crypto_vpermxor_v2di) +BU_CRYPTO_3 (VPERMXOR_V4SI, "vpermxor_v4si", CONST, crypto_vpermxor_v4si) +BU_CRYPTO_3 (VPERMXOR_V8HI, "vpermxor_v8hi", CONST, crypto_vpermxor_v8hi) +BU_CRYPTO_3 (VPERMXOR_V16QI, "vpermxor_v16qi", CONST, crypto_vpermxor_v16qi) +BU_CRYPTO_3 (VSHASIGMAW, "vshasigmaw", CONST, crypto_vshasigmaw) +BU_CRYPTO_3 (VSHASIGMAD, "vshasigmad", CONST, crypto_vshasigmad) + +/* 2 argument crypto overloaded functions. */ +BU_CRYPTO_OVERLOAD_2 (VPMSUM, "vpmsum") + +/* 3 argument crypto overloaded functions. */ +BU_CRYPTO_OVERLOAD_3 (VPERMXOR, "vpermxor") +BU_CRYPTO_OVERLOAD_3 (VSHASIGMA, "vshasigma") + + /* 3 argument paired floating point builtins. */ BU_PAIRED_3 (MSUB, "msub", FP, fmsv2sf4) BU_PAIRED_3 (MADD, "madd", FP, fmav2sf4) Index: gcc/config/rs6000/rs6000-c.c =================================================================== --- gcc/config/rs6000/rs6000-c.c (revision 199122) +++ gcc/config/rs6000/rs6000-c.c (working copy) @@ -335,6 +335,8 @@ rs6000_target_modify_macros (bool define rs6000_define_or_undefine_macro (define_p, "__VSX__"); if ((flags & OPTION_MASK_P8_VECTOR) != 0) rs6000_define_or_undefine_macro (define_p, "__POWER8_VECTOR__"); + if ((flags & OPTION_MASK_CRYPTO) != 0) + rs6000_define_or_undefine_macro (define_p, "__CRYPTO__"); /* options from the builtin masks. */ if ((bu_mask & RS6000_BTM_SPE) != 0) @@ -3381,6 +3383,40 @@ const struct altivec_builtin_types altiv { ALTIVEC_BUILTIN_VEC_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P, RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, + /* Crypto builtins. */ + { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V16QI, + RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, + RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, + { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V8HI, + RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, + RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, + { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V4SI, + RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, + RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, + { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V2DI, + RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, + RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, + + { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMB, + RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, + RS6000_BTI_unsigned_V16QI, 0 }, + { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMH, + RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, + RS6000_BTI_unsigned_V8HI, 0 }, + { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMW, + RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, + RS6000_BTI_unsigned_V4SI, 0 }, + { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMD, + RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, + RS6000_BTI_unsigned_V2DI, 0 }, + + { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAW, + RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, + RS6000_BTI_INTSI, RS6000_BTI_INTSI }, + { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAD, + RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, + RS6000_BTI_INTSI, RS6000_BTI_INTSI }, + { (enum rs6000_builtins) 0, (enum rs6000_builtins) 0, 0, 0, 0, 0 } }; @@ -3828,7 +3864,8 @@ altivec_resolve_overloaded_builtin (loca && (desc->op2 == RS6000_BTI_NOT_OPAQUE || rs6000_builtin_type_compatible (types[1], desc->op2)) && (desc->op3 == RS6000_BTI_NOT_OPAQUE - || rs6000_builtin_type_compatible (types[2], desc->op3))) + || rs6000_builtin_type_compatible (types[2], desc->op3)) + && rs6000_builtin_decls[desc->overloaded_code] != NULL_TREE) return altivec_build_resolved_builtin (args, n, desc); bad: Index: gcc/config/rs6000/rs6000.c =================================================================== --- gcc/config/rs6000/rs6000.c (revision 199122) +++ gcc/config/rs6000/rs6000.c (working copy) @@ -10676,6 +10676,27 @@ rs6000_expand_ternop_builtin (enum insn_ return const0_rtx; } } + else if (icode == CODE_FOR_crypto_vshasigmaw + || icode == CODE_FOR_crypto_vshasigmad) + { + /* Check whether the 2nd and 3rd arguments are integer constants and in + range and prepare arguments. */ + STRIP_NOPS (arg1); + if (TREE_CODE (arg1) != INTEGER_CST + || !IN_RANGE (TREE_INT_CST_LOW (arg1), 0, 1)) + { + error ("argument 2 must be 0 or 1"); + return const0_rtx; + } + + STRIP_NOPS (arg2); + if (TREE_CODE (arg2) != INTEGER_CST + || !IN_RANGE (TREE_INT_CST_LOW (arg2), 0, 15)) + { + error ("argument 3 must be in the range 0..15"); + return const0_rtx; + } + } if (target == 0 || GET_MODE (target) != tmode @@ -12366,6 +12387,10 @@ altivec_init_builtins (void) = build_function_type_list (integer_type_node, integer_type_node, V4SI_type_node, V4SI_type_node, NULL_TREE); + tree int_ftype_int_v2di_v2di + = build_function_type_list (integer_type_node, + integer_type_node, V2DI_type_node, + V2DI_type_node, NULL_TREE); tree void_ftype_v4si = build_function_type_list (void_type_node, V4SI_type_node, NULL_TREE); tree v8hi_ftype_void @@ -12448,6 +12473,8 @@ altivec_init_builtins (void) = build_function_type_list (integer_type_node, integer_type_node, V2DF_type_node, V2DF_type_node, NULL_TREE); + tree v2di_ftype_v2di + = build_function_type_list (V2DI_type_node, V2DI_type_node, NULL_TREE); tree v4si_ftype_v4si = build_function_type_list (V4SI_type_node, V4SI_type_node, NULL_TREE); tree v8hi_ftype_v8hi @@ -12583,6 +12610,9 @@ altivec_init_builtins (void) case VOIDmode: type = int_ftype_int_opaque_opaque; break; + case V2DImode: + type = int_ftype_int_v2di_v2di; + break; case V4SImode: type = int_ftype_int_v4si_v4si; break; @@ -12616,6 +12646,9 @@ altivec_init_builtins (void) switch (mode0) { + case V2DImode: + type = v2di_ftype_v2di; + break; case V4SImode: type = v4si_ftype_v4si; break; @@ -12821,11 +12854,26 @@ builtin_function_type (enum machine_mode are type correct. */ switch (builtin) { + /* unsigned 1 argument functions. */ + case CRYPTO_BUILTIN_VSBOX: + h.uns_p[0] = 1; + h.uns_p[1] = 1; + break; + /* unsigned 2 argument functions. */ case ALTIVEC_BUILTIN_VMULEUB_UNS: case ALTIVEC_BUILTIN_VMULEUH_UNS: case ALTIVEC_BUILTIN_VMULOUB_UNS: case ALTIVEC_BUILTIN_VMULOUH_UNS: + case CRYPTO_BUILTIN_VCIPHER: + case CRYPTO_BUILTIN_VCIPHERLAST: + case CRYPTO_BUILTIN_VNCIPHER: + case CRYPTO_BUILTIN_VNCIPHERLAST: + case CRYPTO_BUILTIN_VPMSUMB: + case CRYPTO_BUILTIN_VPMSUMH: + case CRYPTO_BUILTIN_VPMSUMW: + case CRYPTO_BUILTIN_VPMSUMD: + case CRYPTO_BUILTIN_VPMSUM: h.uns_p[0] = 1; h.uns_p[1] = 1; h.uns_p[2] = 1; @@ -12848,6 +12896,14 @@ builtin_function_type (enum machine_mode case VSX_BUILTIN_XXSEL_8HI_UNS: case VSX_BUILTIN_XXSEL_4SI_UNS: case VSX_BUILTIN_XXSEL_2DI_UNS: + case CRYPTO_BUILTIN_VPERMXOR: + case CRYPTO_BUILTIN_VPERMXOR_V2DI: + case CRYPTO_BUILTIN_VPERMXOR_V4SI: + case CRYPTO_BUILTIN_VPERMXOR_V8HI: + case CRYPTO_BUILTIN_VPERMXOR_V16QI: + case CRYPTO_BUILTIN_VSHASIGMAW: + case CRYPTO_BUILTIN_VSHASIGMAD: + case CRYPTO_BUILTIN_VSHASIGMA: h.uns_p[0] = 1; h.uns_p[1] = 1; h.uns_p[2] = 1; Index: gcc/config/rs6000/crypto.md =================================================================== --- gcc/config/rs6000/crypto.md (revision 0) +++ gcc/config/rs6000/crypto.md (revision 0) @@ -0,0 +1,101 @@ +;; Cryptographic instructions added in ISA 2.07 +;; Copyright (C) 2012-2013 Free Software Foundation, Inc. +;; Contributed by Michael Meissner (meissner@linux.vnet.ibm.com) + +;; This file is part of GCC. + +;; GCC is free software; you can redistribute it and/or modify it +;; under the terms of the GNU General Public License as published +;; by the Free Software Foundation; either version 3, or (at your +;; option) any later version. + +;; GCC is distributed in the hope that it will be useful, but WITHOUT +;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +;; License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; . + +(define_c_enum "unspec" + [UNSPEC_VCIPHER + UNSPEC_VNCIPHER + UNSPEC_VCIPHERLAST + UNSPEC_VNCIPHERLAST + UNSPEC_VSBOX + UNSPEC_VSHASIGMA + UNSPEC_VPERMXOR + UNSPEC_VPMSUM]) + +;; Iterator for VPMSUM/VPERMXOR +(define_mode_iterator CR_mode [V16QI V8HI V4SI V2DI]) + +(define_mode_attr CR_char [(V16QI "b") + (V8HI "h") + (V4SI "w") + (V2DI "d")]) + +;; Iterator for VSHASIGMAD/VSHASIGMAW +(define_mode_iterator CR_hash [V4SI V2DI]) + +;; Iterator for the other crypto functions +(define_int_iterator CR_code [UNSPEC_VCIPHER + UNSPEC_VNCIPHER + UNSPEC_VCIPHERLAST + UNSPEC_VNCIPHERLAST]) + +(define_int_attr CR_insn [(UNSPEC_VCIPHER "vcipher") + (UNSPEC_VNCIPHER "vncipher") + (UNSPEC_VCIPHERLAST "vcipherlast") + (UNSPEC_VNCIPHERLAST "vncipherlast")]) + +;; 2 operand crypto instructions +(define_insn "crypto_" + [(set (match_operand:V2DI 0 "register_operand" "=v") + (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "v") + (match_operand:V2DI 2 "register_operand" "v")] + CR_code))] + "TARGET_CRYPTO" + " %0,%1,%2" + [(set_attr "type" "crypto")]) + +(define_insn "crypto_vpmsum" + [(set (match_operand:CR_mode 0 "register_operand" "=v") + (unspec:CR_mode [(match_operand:CR_mode 1 "register_operand" "v") + (match_operand:CR_mode 2 "register_operand" "v")] + UNSPEC_VPMSUM))] + "TARGET_CRYPTO" + "vpmsum %0,%1,%2" + [(set_attr "type" "crypto")]) + +;; 3 operand crypto instructions +(define_insn "crypto_vpermxor_" + [(set (match_operand:CR_mode 0 "register_operand" "=v") + (unspec:CR_mode [(match_operand:CR_mode 1 "register_operand" "v") + (match_operand:CR_mode 2 "register_operand" "v") + (match_operand:CR_mode 3 "register_operand" "v")] + UNSPEC_VPERMXOR))] + "TARGET_CRYPTO" + "vpermxor %0,%1,%2,%3" + [(set_attr "type" "crypto")]) + +;; 1 operand crypto instruction +(define_insn "crypto_vsbox" + [(set (match_operand:V2DI 0 "register_operand" "=v") + (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "v")] + UNSPEC_VSBOX))] + "TARGET_CRYPTO" + "vsbox %0,%1" + [(set_attr "type" "crypto")]) + +;; Hash crypto instructions +(define_insn "crypto_vshasigma" + [(set (match_operand:CR_hash 0 "register_operand" "=v") + (unspec:CR_hash [(match_operand:CR_hash 1 "register_operand" "v") + (match_operand:SI 2 "const_0_to_1_operand" "n") + (match_operand:SI 3 "const_0_to_15_operand" "n")] + UNSPEC_VSHASIGMA))] + "TARGET_CRYPTO" + "vshasigma %0,%1,%2,%3" + [(set_attr "type" "crypto")]) Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 199122) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -146,7 +146,7 @@ (define_c_enum "unspecv" ;; Define an insn type attribute. This is used in function unit delay ;; computations. -(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel,popcnt" +(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel,popcnt,crypto" (const_string "integer")) ;; Define floating point instruction sub-types for use with Xfpu.md @@ -14788,7 +14788,7 @@ (define_insn "bpermd_" (match_operand:P 2 "gpc_reg_operand" "r")] UNSPEC_BPERM))] "TARGET_POPCNTD" "bpermd %0,%1,%2" - [(set_attr "type" "integer")]) + [(set_attr "type" "popcnt")]) ;; Builtin fma support. Handle @@ -14931,3 +14931,4 @@ (define_insn "rs6000_mftb_" (include "spe.md") (include "dfp.md") (include "paired.md") +(include "crypto.md")