From patchwork Mon May 20 14:47:25 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kaushik Phatak X-Patchwork-Id: 245050 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id E02042C009E for ; Tue, 21 May 2013 00:48:37 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:references:in-reply-to :content-type:content-transfer-encoding:mime-version; q=dns; s= default; b=xillssjK/6WYWDdnjyRfumIKNkaMCXXtQVExhMtcCwpwHITAdbr5s RozoczB9uNnCagWm3+VtkCbk743TIRCI+MGXNZfYZFPITX2PEqOFMVlXlm8Gs79z kN8gXpzf7iCKgtmjRVOvywpaQa3Cjv8e3/1Fmk11HgH/n/w5tC/C2U= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:references:in-reply-to :content-type:content-transfer-encoding:mime-version; s=default; bh=pgvhLV7bH1KiNhUQe6MEAe3Rkk0=; b=gtJHI/vJxokxqQzpqTVJaU6leMCz s2osK35G/GbKJ+e6W/nMRSP2w6qdD4RtwqcFmxkE5rhuTy0SUfzJXLVSakUZdNfT YPPoUNgo4lgR+HkI9Kwfw7rt/mz+UH7yr2ZnuCfXM/YOmiDxYHRUAGT8n5ATLT4R JyLDfp83I6yeUrM= Received: (qmail 15826 invoked by alias); 20 May 2013 14:48:30 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 15814 invoked by uid 89); 20 May 2013 14:48:30 -0000 X-Spam-SWARE-Status: No, score=-3.7 required=5.0 tests=AWL, BAYES_00, KHOP_RCVD_UNTRUST, KHOP_THREADED, RCVD_IN_DNSWL_MED, RCVD_IN_HOSTKARMA_W, TW_LQ, TW_OV, TW_XF autolearn=ham version=3.3.1 Received: from tx2ehsobe003.messaging.microsoft.com (HELO tx2outboundpool.messaging.microsoft.com) (65.55.88.13) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Mon, 20 May 2013 14:48:29 +0000 Received: from mail53-tx2-R.bigfish.com (10.9.14.233) by TX2EHSOBE006.bigfish.com (10.9.40.26) with Microsoft SMTP Server id 14.1.225.23; Mon, 20 May 2013 14:48:27 +0000 Received: from mail53-tx2 (localhost [127.0.0.1]) by mail53-tx2-R.bigfish.com (Postfix) with ESMTP id 1527D200CD0; Mon, 20 May 2013 14:48:27 +0000 (UTC) X-Forefront-Antispam-Report: CIP:59.163.77.45; KIP:(null); UIP:(null); IPV:NLI; H:KCHJEXHC01.kpit.com; RD:59.163.77.45.static.vsnl.net.in; EFVD:NLI X-SpamScore: -2 X-BigFish: VPS-2(zz936eI1447Izz1f42h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ah1fc6hzz8275bhz2dh2a8h668h839h944hd25hf0ah1220h1288h12a5h12a9h12bdh137ah13b6h1441h14ddh1504h1537h153bh15d0h162dh1631h1758h18e1h1946h19b5h1b0ah1d0ch1d2eh1d3fh1155h) Received: from mail53-tx2 (localhost.localdomain [127.0.0.1]) by mail53-tx2 (MessageSwitch) id 1369061251573947_7106; Mon, 20 May 2013 14:47:31 +0000 (UTC) Received: from TX2EHSMHS037.bigfish.com (unknown [10.9.14.238]) by mail53-tx2.bigfish.com (Postfix) with ESMTP id 707AD220435; Mon, 20 May 2013 14:47:31 +0000 (UTC) Received: from KCHJEXHC01.kpit.com (59.163.77.45) by TX2EHSMHS037.bigfish.com (10.9.99.137) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 20 May 2013 14:47:30 +0000 Received: from KCHJEXMB02.kpit.com ([169.254.2.54]) by KCHJEXHC01.kpit.com ([172.10.15.73]) with mapi id 14.03.0123.003; Mon, 20 May 2013 20:17:26 +0530 From: Kaushik Phatak To: "gcc-patches@gcc.gnu.org" CC: Richard Henderson , "DJ Delorie (dj@redhat.com)" Subject: RE: [PATCH:RL78] Add new insn for mulqi3 and mulhi3 Date: Mon, 20 May 2013 14:47:25 +0000 Message-ID: References: <5196909A.3050502@redhat.com> In-Reply-To: <5196909A.3050502@redhat.com> MIME-Version: 1.0 X-OriginatorOrg: kpitcummins.com Hi Richard, Thanks for the quick review. > No constraints on define_expand, only predicates. >> +(define_insn "mulhi3_g13" >These names are not used. They should be prefixed with "*" to indicate the name is just for documentation. I have made the suggested changes. Please find below an updated version of this patch. Let me know if OK to commit the same. Regards, Kaushik 2013-05-20 Kaushik Phatak * config/rl78/rl78.md (mulqi3,mulhi3): New define_expands. (mulqi3_rl78,mulhi3_rl78,mulhi3_g13): New define_insns. Index: gcc/config/rl78/rl78.md =================================================================== --- gcc/config/rl78/rl78.md (revision 199105) +++ gcc/config/rl78/rl78.md (working copy) @@ -235,6 +235,24 @@ [(set_attr "valloc" "macax")] ) +(define_expand "mulqi3" + [(set (match_operand:QI 0 "register_operand" "") + (mult:QI (match_operand:QI 1 "general_operand" "") + (match_operand:QI 2 "nonmemory_operand" ""))) + ] + "" ; mulu supported by all targets + "" +) + +(define_expand "mulhi3" + [(set (match_operand:HI 0 "register_operand" "") + (mult:HI (match_operand:HI 1 "general_operand" "") + (match_operand:HI 2 "nonmemory_operand" ""))) + ] + "! RL78_MUL_NONE" + "" +) + (define_expand "mulsi3" [(set (match_operand:SI 0 "register_operand" "=&v") (mult:SI (match_operand:SI 1 "nonmemory_operand" "vi") @@ -244,6 +262,55 @@ "" ) +(define_insn "*mulqi3_rl78" + [(set (match_operand:QI 0 "register_operand" "=&v") + (mult:QI (match_operand:QI 1 "general_operand" "+viU") + (match_operand:QI 2 "general_operand" "vi"))) + ] + "" ; mulu supported by all targets + "; mulqi macro %0 = %1 * %2 + mov a, %h1 + mov x, a + mov a, %h2 + mulu x ; ax = a * x + mov a, x + mov %h0, a + ; end of mulqi macro" +) + +(define_insn "*mulhi3_rl78" + [(set (match_operand:HI 0 "register_operand" "=&v") + (mult:HI (match_operand:HI 1 "general_operand" "+viU") + (match_operand:HI 2 "general_operand" "vi"))) + ] + "RL78_MUL_RL78" + "; mulhi macro %0 = %1 * %2 + movw ax, %h1 + movw bc, %h2 + mulhu ; bcax = bc * ax + movw %h0, ax + ; end of mulhi macro" +) + +(define_insn "*mulhi3_g13" + [(set (match_operand:HI 0 "register_operand" "=&v") + (mult:HI (match_operand:HI 1 "general_operand" "+viU") + (match_operand:HI 2 "general_operand" "vi"))) + ] + "RL78_MUL_G13" + "; mulhi macro %0 = %1 * %2 + mov a, #0x00 + mov !0xf00e8, a ; MDUC + movw ax, %h1 + movw 0xffff0, ax ; MDAL + movw ax, %h2 + movw 0xffff2, ax ; MDAH + nop ; mdb = mdal * mdah + movw ax, 0xffff6 ; MDBL + movw %h0, ax + ; end of mulhi macro" +) + ;; 0xFFFF0 is MACR(L). 0xFFFF2 is MACR(H) but we don't care about it ;; because we're only using the lower 16 bits (which is the upper 16 ;; bits of the result).