Patchwork [U-Boot,v3,07/12] driver:i2c:s3c24x0: adapt driver to new i2c framework

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Submitter Piotr Wilczek
Date May 17, 2013, 12:55 p.m.
Message ID <1368795355-6717-8-git-send-email-p.wilczek@samsung.com>
Download mbox | patch
Permalink /patch/244638/
State Changes Requested
Delegated to: Minkyu Kang
Headers show

Comments

Piotr Wilczek - May 17, 2013, 12:55 p.m.
The s3c24x0 i2c driver is adapted to new i2c framework.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>

Tested on Trats2
Tested-by: Piotr Wilczek <p.wilczek@samsung.com>
---
Changes in v3: None
Changes in v2: None

 drivers/i2c/Makefile      |    2 +-
 drivers/i2c/s3c24x0_i2c.c |  100 ++++++++++++++++++++++++++-------------------
 2 files changed, 59 insertions(+), 43 deletions(-)

Patch

diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 0298e3e..bae7010 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -36,7 +36,6 @@  COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
 COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
 COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
 COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
-COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
 COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
 COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
 COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o
@@ -47,6 +46,7 @@  COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
 COBJS-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
 COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
 COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
+COBJS-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 46d2506..97f1c00 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -39,8 +39,6 @@ 
 #include <i2c.h>
 #include "s3c24x0_i2c.h"
 
-#ifdef CONFIG_HARD_I2C
-
 #define	I2C_WRITE	0
 #define I2C_READ	1
 
@@ -123,17 +121,17 @@  static void ReadWriteByte(struct s3c24x0_i2c *i2c)
 	writel(readl(&i2c->iiccon) & ~I2CCON_IRPND, &i2c->iiccon);
 }
 
-static struct s3c24x0_i2c *get_base_i2c(void)
+static struct s3c24x0_i2c *get_base_i2c(int bus)
 {
 #ifdef CONFIG_EXYNOS4
 	struct s3c24x0_i2c *i2c = (struct s3c24x0_i2c *)(samsung_get_base_i2c()
 							+ (EXYNOS4_I2C_SPACING
-							* g_current_bus));
+							* bus));
 	return i2c;
 #elif defined CONFIG_EXYNOS5
 	struct s3c24x0_i2c *i2c = (struct s3c24x0_i2c *)(samsung_get_base_i2c()
 							+ (EXYNOS5_I2C_SPACING
-							* g_current_bus));
+							* bus));
 	return i2c;
 #else
 	return s3c24x0_get_base_i2c();
@@ -167,34 +165,7 @@  static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd)
 	writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->iicstat);
 }
 
-/*
- * MULTI BUS I2C support
- */
-
-#ifdef CONFIG_I2C_MULTI_BUS
-int i2c_set_bus_num(unsigned int bus)
-{
-	struct s3c24x0_i2c *i2c;
-
-	if ((bus < 0) || (bus >= CONFIG_MAX_I2C_NUM)) {
-		debug("Bad bus: %d\n", bus);
-		return -1;
-	}
-
-	g_current_bus = bus;
-	i2c = get_base_i2c();
-	i2c_ch_init(i2c, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-
-	return 0;
-}
-
-unsigned int i2c_get_bus_num(void)
-{
-	return g_current_bus;
-}
-#endif
-
-void i2c_init(int speed, int slaveadd)
+static void s3c24x0_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
 {
 	struct s3c24x0_i2c *i2c;
 #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
@@ -204,7 +175,7 @@  void i2c_init(int speed, int slaveadd)
 
 	/* By default i2c channel 0 is the current bus */
 	g_current_bus = 0;
-	i2c = get_base_i2c();
+	i2c = get_base_i2c(adap->hwadapnr);
 
 	/* wait for some time to give previous transfer a chance to finish */
 	i = I2C_TIMEOUT * 1000;
@@ -417,12 +388,12 @@  static int i2c_transfer(struct s3c24x0_i2c *i2c,
 	return result;
 }
 
-int i2c_probe(uchar chip)
+static int s3c24x0_i2c_probe(struct i2c_adapter *adap, uchar chip)
 {
 	struct s3c24x0_i2c *i2c;
 	uchar buf[1];
 
-	i2c = get_base_i2c();
+	i2c = get_base_i2c(adap->hwadapnr);
 	buf[0] = 0;
 
 	/*
@@ -433,7 +404,8 @@  int i2c_probe(uchar chip)
 	return i2c_transfer(i2c, I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK;
 }
 
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int s3c24x0_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
+			    int alen, uchar *buffer, int len)
 {
 	struct s3c24x0_i2c *i2c;
 	uchar xaddr[4];
@@ -467,7 +439,7 @@  int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 		chip |= ((addr >> (alen * 8)) &
 			 CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
 #endif
-	i2c = get_base_i2c();
+	i2c = get_base_i2c(adap->hwadapnr);
 	ret = i2c_transfer(i2c, I2C_READ, chip << 1, &xaddr[4 - alen], alen,
 			buffer, len);
 	if (ret != 0) {
@@ -477,7 +449,8 @@  int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 	return 0;
 }
 
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int s3c24x0_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
+			     int alen, uchar *buffer, int len)
 {
 	struct s3c24x0_i2c *i2c;
 	uchar xaddr[4];
@@ -509,7 +482,7 @@  int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 		chip |= ((addr >> (alen * 8)) &
 			 CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
 #endif
-	i2c = get_base_i2c();
+	i2c = get_base_i2c(adap->hwadapnr);
 	return (i2c_transfer
 		(i2c, I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer,
 		 len) != 0);
@@ -580,10 +553,53 @@  int i2c_reset_port_fdt(const void *blob, int node)
 		return -1;
 	}
 
-	i2c_ch_init(i2c->regs, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+	i2c_ch_init(i2c->regs, CONFIG_SYS_I2C_S3C24X0_SPEED,
+		    CONFIG_SYS_I2C_S3C24X0_SLAVE);
 
 	return 0;
 }
 #endif
 
-#endif /* CONFIG_HARD_I2C */
+/*
+ * Register soft i2c adapters
+ */
+U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_0, s3c24x0_i2c_init, s3c24x0_i2c_probe,
+			 s3c24x0_i2c_read, s3c24x0_i2c_write, NULL,
+			 CONFIG_SYS_I2C_S3C24X0_SPEED,
+			 CONFIG_SYS_I2C_S3C24X0_SLAVE,
+			 0)
+U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_1, s3c24x0_i2c_init, s3c24x0_i2c_probe,
+			 s3c24x0_i2c_read, s3c24x0_i2c_write, NULL,
+			 CONFIG_SYS_I2C_S3C24X0_SPEED,
+			 CONFIG_SYS_I2C_S3C24X0_SLAVE,
+			 1)
+U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_2, s3c24x0_i2c_init, s3c24x0_i2c_probe,
+			 s3c24x0_i2c_read, s3c24x0_i2c_write, NULL,
+			 CONFIG_SYS_I2C_S3C24X0_SPEED,
+			 CONFIG_SYS_I2C_S3C24X0_SLAVE,
+			 2)
+U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_3, s3c24x0_i2c_init, s3c24x0_i2c_probe,
+			 s3c24x0_i2c_read, s3c24x0_i2c_write, NULL,
+			 CONFIG_SYS_I2C_S3C24X0_SPEED,
+			 CONFIG_SYS_I2C_S3C24X0_SLAVE,
+			 3)
+U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_4, s3c24x0_i2c_init, s3c24x0_i2c_probe,
+			 s3c24x0_i2c_read, s3c24x0_i2c_write, NULL,
+			 CONFIG_SYS_I2C_S3C24X0_SPEED,
+			 CONFIG_SYS_I2C_S3C24X0_SLAVE,
+			 4)
+U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_5, s3c24x0_i2c_init, s3c24x0_i2c_probe,
+			 s3c24x0_i2c_read, s3c24x0_i2c_write, NULL,
+			 CONFIG_SYS_I2C_S3C24X0_SPEED,
+			 CONFIG_SYS_I2C_S3C24X0_SLAVE,
+			 5)
+U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_6, s3c24x0_i2c_init, s3c24x0_i2c_probe,
+			 s3c24x0_i2c_read, s3c24x0_i2c_write, NULL,
+			 CONFIG_SYS_I2C_S3C24X0_SPEED,
+			 CONFIG_SYS_I2C_S3C24X0_SLAVE,
+			 6)
+U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_7, s3c24x0_i2c_init, s3c24x0_i2c_probe,
+			 s3c24x0_i2c_read, s3c24x0_i2c_write, NULL,
+			 CONFIG_SYS_I2C_S3C24X0_SPEED,
+			 CONFIG_SYS_I2C_S3C24X0_SLAVE,
+			 7)