From patchwork Fri May 17 11:12:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Zijlstra X-Patchwork-Id: 244617 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id D6D3B2C0199 for ; Fri, 17 May 2013 21:14:58 +1000 (EST) Received: by ozlabs.org (Postfix) id BCB542C00A7; Fri, 17 May 2013 21:14:31 +1000 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:4830:2446:ff00:4687:fcff:fea6:5117]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6CCAC2C00A3 for ; Fri, 17 May 2013 21:14:31 +1000 (EST) Received: from dhcp-089-099-019-018.chello.nl ([89.99.19.18] helo=dyad.programming.kicks-ass.net) by bombadil.infradead.org with esmtpsa (Exim 4.80.1 #2 (Red Hat Linux)) id 1UdIc0-0001ju-B3; Fri, 17 May 2013 11:14:12 +0000 Received: by dyad.programming.kicks-ass.net (Postfix, from userid 1000) id 19BC272B3; Fri, 17 May 2013 13:12:33 +0200 (CEST) Date: Fri, 17 May 2013 13:12:32 +0200 From: Peter Zijlstra To: Stephane Eranian Subject: Re: [PATCH 3/3] perf, x86, lbr: Demand proper privileges for PERF_SAMPLE_BRANCH_KERNEL Message-ID: <20130517111232.GE5162@dyad.programming.kicks-ass.net> References: <20130503121122.931661809@chello.nl> <20130503121256.230745028@chello.nl> <20130516090916.GF19669@dyad.programming.kicks-ass.net> <8578.1368699317@ale.ozlabs.ibm.com> <20130516111634.GA15314@twins.programming.kicks-ass.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2012-12-30) Cc: Michael Neuling , "ak@linux.intel.com" , LKML , Linux PPC dev , Ingo Molnar X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, May 16, 2013 at 05:36:11PM +0200, Stephane Eranian wrote: > On Thu, May 16, 2013 at 1:16 PM, Peter Zijlstra wrote: > > On Thu, May 16, 2013 at 08:15:17PM +1000, Michael Neuling wrote: > >> Peter, > >> > >> BTW PowerPC also has the ability to filter on conditional branches. Any > >> chance we could add something like the follow to perf also? > >> > > > > I don't see an immediate problem with that except that we on x86 need to > > implement that in the software filter. Stephane do you see any > > fundamental issue with that? > > > On X86, the LBR cannot filter on conditional in HW. Thus as Peter said, it would > have to be done in SW. I did not add that because I think those branches are > not necessarily useful for tools. Wouldn't it be mostly conditional branches that are the primary control flow and can get predicted wrong? I mean, I'm sure someone will miss-predict an unconditional branch but its not like we care about people with such afflictions do we? Anyway, since PPC people thought it worth baking into hardware, presumably they have a compelling use case. Mikey could you see if you can retrieve that from someone in the know? It might be interesting. Also, it looks like its trivial to add to x86, you seem to have already done all the hard work by having X86_BR_JCC. The only missing piece would be: --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c @@ -337,6 +337,10 @@ static int intel_pmu_setup_sw_lbr_filter if (br_type & PERF_SAMPLE_BRANCH_IND_CALL) mask |= X86_BR_IND_CALL; + + if (br_type & PERF_SAMPLE_BRANCH_CONDITIONAL) + mask |= X86_BR_JCC; + /* * stash actual user request into reg, it may * be used by fixup code for some CPU