[3.5.y.z,extended,stable] Patch "powerpc: Add isync to copy_and_flush" has been added to staging queue

Message ID 1368614021-23952-1-git-send-email-luis.henriques@canonical.com
State New
Headers show

Commit Message

Luis Henriques May 15, 2013, 10:33 a.m.
This is a note to let you know that I have just added a patch titled

    powerpc: Add isync to copy_and_flush

to the linux-3.5.y-queue branch of the 3.5.y.z extended stable tree 
which can be found at:


If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.5.y.z tree, see



From 277be0289f5a7f8396be48738f3a4b0740c6043f Mon Sep 17 00:00:00 2001
From: Michael Neuling <michael.neuling@au1.ibm.com>
Date: Wed, 24 Apr 2013 00:30:09 +0000
Subject: [PATCH] powerpc: Add isync to copy_and_flush

commit 29ce3c5073057991217916abc25628e906911757 upstream.

In __after_prom_start we copy the kernel down to zero in two calls to
copy_and_flush.  After the first call (copy from 0 to copy_to_here:)
we jump to the newly copied code soon after.

Unfortunately there's no isync between the copy of this code and the
jump to it.  Hence it's possible that stale instructions could still be
in the icache or pipeline before we branch to it.

We've seen this on real machines and it's results in no console output
  calling quiesce...
  returning from prom_init

The below adds an isync to ensure that the copy and flushing has
completed before any branching to the new instructions occurs.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
 arch/powerpc/kernel/head_64.S | 1 +
 1 file changed, 1 insertion(+)



diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 9e07bd0..1a3607b 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -489,6 +489,7 @@  _GLOBAL(copy_and_flush)
 	addi	r5,r5,8
 	addi	r6,r6,8
+	isync

 .align 8