Patchwork [3.5.y.z,extended,stable] Patch "i2c: xiic: must always write 16-bit words to TX_FIFO" has been added to staging queue

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Submitter Luis Henriques
Date May 15, 2013, 10:33 a.m.
Message ID <>
Download mbox | patch
Permalink /patch/243990/
State New
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Luis Henriques - May 15, 2013, 10:33 a.m.
This is a note to let you know that I have just added a patch titled

    i2c: xiic: must always write 16-bit words to TX_FIFO

to the linux-3.5.y-queue branch of the 3.5.y.z extended stable tree 
which can be found at:;a=shortlog;h=refs/heads/linux-3.5.y-queue

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.5.y.z tree, see



From a371255c82d65bca8c041bdc8634433be2690d4d Mon Sep 17 00:00:00 2001
From: "Steven A. Falco" <>
Date: Mon, 22 Apr 2013 09:34:39 +0000
Subject: [PATCH] i2c: xiic: must always write 16-bit words to TX_FIFO

commit c39e8e4354ce4daf23336de5daa28a3b01f00aa6 upstream.

The TX_FIFO register is 10 bits wide.  The lower 8 bits are the data to be
written, while the upper two bits are flags to indicate stop/start.

The driver apparently attempted to optimize write access, by only writing a
byte in those cases where the stop/start bits are zero.  However, we have
seen cases where the lower byte is duplicated onto the upper byte by the
hardware, which causes inadvertent stop/starts.

This patch changes the write access to the transmit FIFO to always be 16 bits

Signed off by: Steven A. Falco <>
Signed-off-by: Wolfram Sang <>
Signed-off-by: Luis Henriques <>
 drivers/i2c/busses/i2c-xiic.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)



diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index 641d0e5..15d20de 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -312,10 +312,8 @@  static void xiic_fill_tx_fifo(struct xiic_i2c *i2c)
 			/* last message in transfer -> STOP */
 			data |= XIIC_TX_DYN_STOP_MASK;
 			dev_dbg(i2c->, "%s TX STOP\n", __func__);
-			xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
-		} else
-			xiic_setreg8(i2c, XIIC_DTR_REG_OFFSET, data);
+		}
+		xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);