Patchwork [v5,03/11] mtd: get the ECC info from the parameter page for ONFI nand

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Submitter Huang Shijie
Date May 15, 2013, 8:40 a.m.
Message ID <1368607232-2210-4-git-send-email-b32955@freescale.com>
Download mbox | patch
Permalink /patch/243948/
State New
Headers show

Comments

Huang Shijie - May 15, 2013, 8:40 a.m.
From the ONFI spec, we can just get the ECC info from the @ecc_bits field of
the parameter page.

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 drivers/mtd/nand/nand_base.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)
Vikram Narayanan - May 15, 2013, 5:04 p.m.
On 5/15/2013 2:10 PM, Huang Shijie wrote:
>  From the ONFI spec, we can just get the ECC info from the @ecc_bits field of
> the parameter page.

I wonder what do we do, if the chip is not ONFI compliant?
which means when the legacy calculation in GPMI goes wrong?

> Signed-off-by: Huang Shijie <b32955@freescale.com>
> ---
>   drivers/mtd/nand/nand_base.c |    5 +++++
>   1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index edc7663..15630ef 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -2900,6 +2900,11 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
>   	if (le16_to_cpu(p->features) & 1)
>   		*busw = NAND_BUSWIDTH_16;
>
> +	if (p->ecc_bits != 0xff) {
> +		chip->ecc_strength = p->ecc_bits;
> +		chip->ecc_step = 512;
> +	}
> +
>   	pr_info("ONFI flash detected\n");
>   	return 1;
>   }
>
Huang Shijie - May 16, 2013, 2:21 a.m.
于 2013年05月16日 01:04, Vikram Narayanan 写道:
> I wonder what do we do, if the chip is not ONFI compliant?
> which means when the legacy calculation in GPMI goes wrong?
It may goes wrong _sometimes_.

For example, the TC58NVG5D2 requires 40bits per 1024bytes.
the legacy gpmi will fail in this nand. the gpmi assumes it can use all 
the oob,
so it get a 56bits per 1024types. the 56bits is beyond its hardware's 
capacity.
it will fail in this case. But with this patch set, the gpmi works fine.

thanks
Huang Shijie

Patch

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index edc7663..15630ef 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2900,6 +2900,11 @@  static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
 	if (le16_to_cpu(p->features) & 1)
 		*busw = NAND_BUSWIDTH_16;
 
+	if (p->ecc_bits != 0xff) {
+		chip->ecc_strength = p->ecc_bits;
+		chip->ecc_step = 512;
+	}
+
 	pr_info("ONFI flash detected\n");
 	return 1;
 }